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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc10494 case MCK_ZPRExtendSXTW328Only: {
12172 case MCK_ZPRExtendSXTW328Only: return "MCK_ZPRExtendSXTW328Only";
14938 { 1858 /* ld1b */, AArch64::GLD1B_S_SXTW_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW328Only1_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW328Only, MCK__93_ }, },
14950 { 1858 /* ld1b */, AArch64::GLD1B_S_SXTW_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW328Only1_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW328Only, MCK__93_ }, },
15182 { 1951 /* ld1sb */, AArch64::GLD1SB_S_SXTW_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW328Only1_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW328Only, MCK__93_ }, },
15192 { 1951 /* ld1sb */, AArch64::GLD1SB_S_SXTW_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW328Only1_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW328Only, MCK__93_ }, },
15780 { 2450 /* ldff1b */, AArch64::GLDFF1B_S_SXTW_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW328Only1_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW328Only, MCK__93_ }, },
15792 { 2450 /* ldff1b */, AArch64::GLDFF1B_S_SXTW_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW328Only1_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW328Only, MCK__93_ }, },
15872 { 2471 /* ldff1sb */, AArch64::GLDFF1SB_S_SXTW_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW328Only1_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW328Only, MCK__93_ }, },
15882 { 2471 /* ldff1sb */, AArch64::GLDFF1SB_S_SXTW_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW328Only1_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW328Only, MCK__93_ }, },
16850 { 3668 /* prfb */, AArch64::PRFB_S_SXTW_SCALED, Convert__SVEPrefetch1_0__SVEPredicate3bAnyReg1_1__Reg1_3__ZPRExtendSXTW328Only1_4, AMFBS_HasSVE, { MCK_SVEPrefetch, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW328Only, MCK__93_ }, },
18273 { 5238 /* st1b */, AArch64::SST1B_S_SXTW, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_3__ZPRExtendSXTW328Only1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW328Only, MCK__93_ }, },
18285 { 5238 /* st1b */, AArch64::SST1B_S_SXTW, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_3__ZPRExtendSXTW328Only1_4, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW328Only, MCK__93_ }, },
22296 { 1858 /* ld1b */, AArch64::GLD1B_S_SXTW_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW328Only1_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW328Only, MCK__93_ }, },
22308 { 1858 /* ld1b */, AArch64::GLD1B_S_SXTW_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW328Only1_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW328Only, MCK__93_ }, },
22540 { 1951 /* ld1sb */, AArch64::GLD1SB_S_SXTW_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW328Only1_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW328Only, MCK__93_ }, },
22550 { 1951 /* ld1sb */, AArch64::GLD1SB_S_SXTW_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW328Only1_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW328Only, MCK__93_ }, },
23138 { 2450 /* ldff1b */, AArch64::GLDFF1B_S_SXTW_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW328Only1_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW328Only, MCK__93_ }, },
23150 { 2450 /* ldff1b */, AArch64::GLDFF1B_S_SXTW_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW328Only1_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW328Only, MCK__93_ }, },
23230 { 2471 /* ldff1sb */, AArch64::GLDFF1SB_S_SXTW_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW328Only1_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW328Only, MCK__93_ }, },
23240 { 2471 /* ldff1sb */, AArch64::GLDFF1SB_S_SXTW_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW328Only1_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW328Only, MCK__93_ }, },
24208 { 3668 /* prfb */, AArch64::PRFB_S_SXTW_SCALED, Convert__SVEPrefetch1_0__SVEPredicate3bAnyReg1_1__Reg1_3__ZPRExtendSXTW328Only1_4, AMFBS_HasSVE, { MCK_SVEPrefetch, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW328Only, MCK__93_ }, },
25631 { 5238 /* st1b */, AArch64::SST1B_S_SXTW, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_3__ZPRExtendSXTW328Only1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW328Only, MCK__93_ }, },
25643 { 5238 /* st1b */, AArch64::SST1B_S_SXTW, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_3__ZPRExtendSXTW328Only1_4, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW328Only, MCK__93_ }, },
31061 { 1858 /* ld1b */, 64 /* 6 */, MCK_ZPRExtendSXTW328Only, AMFBS_HasSVE },
31064 { 1858 /* ld1b */, 64 /* 6 */, MCK_ZPRExtendSXTW328Only, AMFBS_HasSVE },
31129 { 1858 /* ld1b */, 64 /* 6 */, MCK_ZPRExtendSXTW328Only, AMFBS_HasSVE },
31132 { 1858 /* ld1b */, 64 /* 6 */, MCK_ZPRExtendSXTW328Only, AMFBS_HasSVE },
31997 { 1951 /* ld1sb */, 64 /* 6 */, MCK_ZPRExtendSXTW328Only, AMFBS_HasSVE },
32000 { 1951 /* ld1sb */, 64 /* 6 */, MCK_ZPRExtendSXTW328Only, AMFBS_HasSVE },
32053 { 1951 /* ld1sb */, 64 /* 6 */, MCK_ZPRExtendSXTW328Only, AMFBS_HasSVE },
32056 { 1951 /* ld1sb */, 64 /* 6 */, MCK_ZPRExtendSXTW328Only, AMFBS_HasSVE },
32937 { 2450 /* ldff1b */, 64 /* 6 */, MCK_ZPRExtendSXTW328Only, AMFBS_HasSVE },
32940 { 2450 /* ldff1b */, 64 /* 6 */, MCK_ZPRExtendSXTW328Only, AMFBS_HasSVE },
33005 { 2450 /* ldff1b */, 64 /* 6 */, MCK_ZPRExtendSXTW328Only, AMFBS_HasSVE },
33008 { 2450 /* ldff1b */, 64 /* 6 */, MCK_ZPRExtendSXTW328Only, AMFBS_HasSVE },
33441 { 2471 /* ldff1sb */, 64 /* 6 */, MCK_ZPRExtendSXTW328Only, AMFBS_HasSVE },
33444 { 2471 /* ldff1sb */, 64 /* 6 */, MCK_ZPRExtendSXTW328Only, AMFBS_HasSVE },
33497 { 2471 /* ldff1sb */, 64 /* 6 */, MCK_ZPRExtendSXTW328Only, AMFBS_HasSVE },
33500 { 2471 /* ldff1sb */, 64 /* 6 */, MCK_ZPRExtendSXTW328Only, AMFBS_HasSVE },
35428 { 3668 /* prfb */, 16 /* 4 */, MCK_ZPRExtendSXTW328Only, AMFBS_HasSVE },
35431 { 3668 /* prfb */, 16 /* 4 */, MCK_ZPRExtendSXTW328Only, AMFBS_HasSVE },
37717 { 5238 /* st1b */, 16 /* 4 */, MCK_ZPRExtendSXTW328Only, AMFBS_HasSVE },
37720 { 5238 /* st1b */, 16 /* 4 */, MCK_ZPRExtendSXTW328Only, AMFBS_HasSVE },
37785 { 5238 /* st1b */, 16 /* 4 */, MCK_ZPRExtendSXTW328Only, AMFBS_HasSVE },
37788 { 5238 /* st1b */, 16 /* 4 */, MCK_ZPRExtendSXTW328Only, AMFBS_HasSVE },
40745 case MCK_ZPRExtendSXTW328Only: