|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AArch64/AArch64GenDisassemblerTables.inc20648 tmp = fieldFromInstruction(insn, 0, 16);
20649 MI.addOperand(MCOperand::createImm(tmp));
20652 tmp = fieldFromInstruction(insn, 0, 5);
20653 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20654 tmp = fieldFromInstruction(insn, 10, 3);
20655 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20656 tmp = fieldFromInstruction(insn, 0, 5);
20657 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20658 tmp = fieldFromInstruction(insn, 5, 5);
20659 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20662 tmp = fieldFromInstruction(insn, 0, 5);
20663 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20664 tmp = fieldFromInstruction(insn, 10, 3);
20665 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20666 tmp = fieldFromInstruction(insn, 5, 5);
20667 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20670 tmp = fieldFromInstruction(insn, 0, 5);
20671 if (!Check(S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20672 tmp = fieldFromInstruction(insn, 10, 3);
20673 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20674 tmp = fieldFromInstruction(insn, 5, 5);
20675 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20678 tmp = fieldFromInstruction(insn, 0, 5);
20679 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20680 tmp = fieldFromInstruction(insn, 10, 3);
20681 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20682 tmp = fieldFromInstruction(insn, 5, 5);
20683 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20686 tmp = fieldFromInstruction(insn, 0, 5);
20687 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20688 tmp = fieldFromInstruction(insn, 10, 3);
20689 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20690 tmp = fieldFromInstruction(insn, 5, 5);
20691 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20694 tmp = fieldFromInstruction(insn, 0, 5);
20695 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20696 tmp = fieldFromInstruction(insn, 0, 5);
20697 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20698 tmp = fieldFromInstruction(insn, 10, 3);
20699 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20700 tmp = fieldFromInstruction(insn, 5, 5);
20701 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20704 tmp = fieldFromInstruction(insn, 0, 5);
20705 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20706 tmp = fieldFromInstruction(insn, 10, 3);
20707 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20708 tmp = fieldFromInstruction(insn, 0, 5);
20709 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20710 tmp = fieldFromInstruction(insn, 5, 5);
20711 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20712 tmp = fieldFromInstruction(insn, 16, 5);
20713 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20716 tmp = fieldFromInstruction(insn, 0, 5);
20717 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20718 tmp = fieldFromInstruction(insn, 10, 3);
20719 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20720 tmp = fieldFromInstruction(insn, 0, 5);
20721 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20722 tmp = fieldFromInstruction(insn, 5, 3);
20723 if (!Check(S, DecodeVecShiftR8Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20726 tmp = fieldFromInstruction(insn, 0, 5);
20727 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20728 tmp = fieldFromInstruction(insn, 10, 3);
20729 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20730 tmp = fieldFromInstruction(insn, 0, 5);
20731 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20732 tmp = fieldFromInstruction(insn, 5, 4);
20733 if (!Check(S, DecodeVecShiftR16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20736 tmp = fieldFromInstruction(insn, 0, 5);
20737 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20738 tmp = fieldFromInstruction(insn, 10, 3);
20739 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20740 tmp = fieldFromInstruction(insn, 0, 5);
20741 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20742 tmp = fieldFromInstruction(insn, 5, 5);
20743 if (!Check(S, DecodeVecShiftR32Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20746 tmp = fieldFromInstruction(insn, 0, 5);
20747 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20748 tmp = fieldFromInstruction(insn, 10, 3);
20749 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20750 tmp = fieldFromInstruction(insn, 0, 5);
20751 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20752 tmp = fieldFromInstruction(insn, 5, 3);
20753 if (!Check(S, DecodeVecShiftL8Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20756 tmp = fieldFromInstruction(insn, 0, 5);
20757 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20758 tmp = fieldFromInstruction(insn, 10, 3);
20759 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20760 tmp = fieldFromInstruction(insn, 0, 5);
20761 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20762 tmp = fieldFromInstruction(insn, 5, 4);
20763 if (!Check(S, DecodeVecShiftL16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20766 tmp = fieldFromInstruction(insn, 0, 5);
20767 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20768 tmp = fieldFromInstruction(insn, 10, 3);
20769 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20770 tmp = fieldFromInstruction(insn, 0, 5);
20771 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20772 tmp = fieldFromInstruction(insn, 5, 5);
20773 if (!Check(S, DecodeVecShiftL32Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20776 tmp = fieldFromInstruction(insn, 0, 5);
20777 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20778 tmp = fieldFromInstruction(insn, 10, 3);
20779 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20780 tmp = fieldFromInstruction(insn, 0, 5);
20781 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20782 tmp = fieldFromInstruction(insn, 16, 5);
20783 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20784 tmp = fieldFromInstruction(insn, 5, 5);
20785 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20788 tmp = fieldFromInstruction(insn, 0, 5);
20789 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20790 tmp = fieldFromInstruction(insn, 10, 3);
20791 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20792 tmp = fieldFromInstruction(insn, 5, 5);
20793 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20796 tmp = fieldFromInstruction(insn, 0, 5);
20797 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20798 tmp = fieldFromInstruction(insn, 10, 3);
20799 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20800 tmp = fieldFromInstruction(insn, 0, 5);
20801 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20802 tmp = 0x0;
20803 tmp |= fieldFromInstruction(insn, 5, 5) << 0;
20804 tmp |= fieldFromInstruction(insn, 22, 1) << 5;
20805 if (!Check(S, DecodeVecShiftR64Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20808 tmp = fieldFromInstruction(insn, 0, 5);
20809 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20810 tmp = fieldFromInstruction(insn, 10, 3);
20811 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20812 tmp = fieldFromInstruction(insn, 0, 5);
20813 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20814 tmp = 0x0;
20815 tmp |= fieldFromInstruction(insn, 5, 5) << 0;
20816 tmp |= fieldFromInstruction(insn, 22, 1) << 5;
20817 if (!Check(S, DecodeVecShiftL64Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20823 tmp = fieldFromInstruction(insn, 0, 5);
20824 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20825 tmp = fieldFromInstruction(insn, 16, 4);
20826 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20827 tmp = fieldFromInstruction(insn, 5, 9);
20828 if (!Check(S, DecodeImm8OptLsl<8>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20831 tmp = fieldFromInstruction(insn, 0, 5);
20832 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20833 tmp = fieldFromInstruction(insn, 16, 4);
20834 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20835 tmp = fieldFromInstruction(insn, 5, 9);
20836 if (!Check(S, DecodeImm8OptLsl<16>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20839 tmp = fieldFromInstruction(insn, 0, 5);
20840 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20841 tmp = fieldFromInstruction(insn, 0, 5);
20842 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20843 tmp = fieldFromInstruction(insn, 16, 4);
20844 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20845 tmp = fieldFromInstruction(insn, 5, 9);
20846 if (!Check(S, DecodeImm8OptLsl<8>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20849 tmp = fieldFromInstruction(insn, 0, 5);
20850 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20851 tmp = fieldFromInstruction(insn, 0, 5);
20852 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20853 tmp = fieldFromInstruction(insn, 16, 4);
20854 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20855 tmp = fieldFromInstruction(insn, 5, 9);
20856 if (!Check(S, DecodeImm8OptLsl<16>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20859 tmp = fieldFromInstruction(insn, 0, 5);
20860 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20861 tmp = fieldFromInstruction(insn, 0, 5);
20862 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20863 tmp = fieldFromInstruction(insn, 16, 4);
20864 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20865 tmp = fieldFromInstruction(insn, 5, 8);
20866 MI.addOperand(MCOperand::createImm(tmp));
20869 tmp = fieldFromInstruction(insn, 0, 5);
20870 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20871 tmp = fieldFromInstruction(insn, 16, 4);
20872 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20873 tmp = fieldFromInstruction(insn, 5, 9);
20874 if (!Check(S, DecodeImm8OptLsl<32>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20877 tmp = fieldFromInstruction(insn, 0, 5);
20878 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20879 tmp = fieldFromInstruction(insn, 16, 4);
20880 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20881 tmp = fieldFromInstruction(insn, 5, 9);
20882 if (!Check(S, DecodeImm8OptLsl<64>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20885 tmp = fieldFromInstruction(insn, 0, 5);
20886 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20887 tmp = fieldFromInstruction(insn, 0, 5);
20888 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20889 tmp = fieldFromInstruction(insn, 16, 4);
20890 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20891 tmp = fieldFromInstruction(insn, 5, 9);
20892 if (!Check(S, DecodeImm8OptLsl<32>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20895 tmp = fieldFromInstruction(insn, 0, 5);
20896 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20897 tmp = fieldFromInstruction(insn, 0, 5);
20898 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20899 tmp = fieldFromInstruction(insn, 16, 4);
20900 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20901 tmp = fieldFromInstruction(insn, 5, 9);
20902 if (!Check(S, DecodeImm8OptLsl<64>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20905 tmp = fieldFromInstruction(insn, 0, 5);
20906 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20907 tmp = fieldFromInstruction(insn, 5, 5);
20908 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20909 tmp = fieldFromInstruction(insn, 16, 5);
20910 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20913 tmp = fieldFromInstruction(insn, 0, 5);
20914 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20915 tmp = fieldFromInstruction(insn, 0, 5);
20916 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20917 tmp = fieldFromInstruction(insn, 5, 5);
20918 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20919 tmp = 0x0;
20920 tmp |= fieldFromInstruction(insn, 10, 3) << 0;
20921 tmp |= fieldFromInstruction(insn, 16, 5) << 3;
20922 MI.addOperand(MCOperand::createImm(tmp));
20925 tmp = fieldFromInstruction(insn, 0, 5);
20926 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20927 tmp = fieldFromInstruction(insn, 5, 5);
20928 if (!Check(S, DecodeZPR2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20929 tmp = 0x0;
20930 tmp |= fieldFromInstruction(insn, 10, 3) << 0;
20931 tmp |= fieldFromInstruction(insn, 16, 5) << 3;
20932 MI.addOperand(MCOperand::createImm(tmp));
20935 tmp = fieldFromInstruction(insn, 0, 5);
20936 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20937 tmp = fieldFromInstruction(insn, 5, 5);
20938 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20939 tmp = fieldFromInstruction(insn, 22, 2);
20940 MI.addOperand(MCOperand::createImm(tmp));
20943 tmp = fieldFromInstruction(insn, 0, 5);
20944 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20945 tmp = fieldFromInstruction(insn, 5, 5);
20946 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20947 tmp = 0x0;
20948 tmp |= fieldFromInstruction(insn, 20, 1) << 0;
20949 tmp |= fieldFromInstruction(insn, 22, 2) << 1;
20950 MI.addOperand(MCOperand::createImm(tmp));
20953 tmp = fieldFromInstruction(insn, 0, 5);
20954 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20955 tmp = fieldFromInstruction(insn, 5, 5);
20956 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20957 tmp = 0x0;
20958 tmp |= fieldFromInstruction(insn, 19, 2) << 0;
20959 tmp |= fieldFromInstruction(insn, 22, 2) << 2;
20960 MI.addOperand(MCOperand::createImm(tmp));
20963 tmp = fieldFromInstruction(insn, 0, 5);
20964 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20965 tmp = fieldFromInstruction(insn, 5, 5);
20966 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20967 tmp = 0x0;
20968 tmp |= fieldFromInstruction(insn, 18, 3) << 0;
20969 tmp |= fieldFromInstruction(insn, 22, 2) << 3;
20970 MI.addOperand(MCOperand::createImm(tmp));
20973 tmp = fieldFromInstruction(insn, 0, 5);
20974 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20975 tmp = fieldFromInstruction(insn, 5, 5);
20976 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20977 tmp = 0x0;
20978 tmp |= fieldFromInstruction(insn, 17, 4) << 0;
20979 tmp |= fieldFromInstruction(insn, 22, 2) << 4;
20980 MI.addOperand(MCOperand::createImm(tmp));
20983 tmp = fieldFromInstruction(insn, 0, 5);
20984 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20985 tmp = fieldFromInstruction(insn, 5, 5);
20986 if (!Check(S, DecodeZPR2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20987 tmp = fieldFromInstruction(insn, 16, 5);
20988 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20991 tmp = fieldFromInstruction(insn, 0, 5);
20992 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20993 tmp = fieldFromInstruction(insn, 0, 5);
20994 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20995 tmp = fieldFromInstruction(insn, 5, 5);
20996 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
20997 tmp = fieldFromInstruction(insn, 16, 5);
20998 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21001 tmp = fieldFromInstruction(insn, 0, 5);
21002 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21003 tmp = fieldFromInstruction(insn, 0, 5);
21004 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21005 tmp = fieldFromInstruction(insn, 5, 5);
21006 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21007 tmp = fieldFromInstruction(insn, 16, 3);
21008 if (!Check(S, DecodeVecShiftR8Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21011 tmp = fieldFromInstruction(insn, 0, 5);
21012 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21013 tmp = fieldFromInstruction(insn, 0, 5);
21014 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21015 tmp = fieldFromInstruction(insn, 5, 5);
21016 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21017 tmp = fieldFromInstruction(insn, 16, 4);
21018 if (!Check(S, DecodeVecShiftR16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21021 tmp = fieldFromInstruction(insn, 0, 5);
21022 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21023 tmp = fieldFromInstruction(insn, 0, 5);
21024 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21025 tmp = fieldFromInstruction(insn, 5, 5);
21026 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21027 tmp = fieldFromInstruction(insn, 16, 5);
21028 if (!Check(S, DecodeVecShiftR32Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21031 tmp = fieldFromInstruction(insn, 0, 5);
21032 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21033 tmp = fieldFromInstruction(insn, 0, 5);
21034 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21035 tmp = fieldFromInstruction(insn, 5, 5);
21036 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21037 tmp = 0x0;
21038 tmp |= fieldFromInstruction(insn, 16, 5) << 0;
21039 tmp |= fieldFromInstruction(insn, 22, 1) << 5;
21040 if (!Check(S, DecodeVecShiftR64Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21043 tmp = fieldFromInstruction(insn, 0, 5);
21044 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21045 tmp = fieldFromInstruction(insn, 0, 5);
21046 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21047 tmp = fieldFromInstruction(insn, 16, 5);
21048 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21049 tmp = fieldFromInstruction(insn, 5, 5);
21050 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21053 tmp = fieldFromInstruction(insn, 0, 5);
21054 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21055 tmp = fieldFromInstruction(insn, 5, 5);
21056 if (!Check(S, DecodeGPR32spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21059 tmp = fieldFromInstruction(insn, 0, 5);
21060 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21061 tmp = fieldFromInstruction(insn, 0, 5);
21062 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21063 tmp = fieldFromInstruction(insn, 5, 5);
21064 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21067 tmp = fieldFromInstruction(insn, 0, 5);
21068 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21069 tmp = fieldFromInstruction(insn, 0, 5);
21070 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21071 tmp = fieldFromInstruction(insn, 5, 5);
21072 if (!Check(S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21075 tmp = fieldFromInstruction(insn, 0, 5);
21076 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21077 tmp = fieldFromInstruction(insn, 5, 5);
21078 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21081 tmp = fieldFromInstruction(insn, 0, 5);
21082 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21083 tmp = fieldFromInstruction(insn, 0, 5);
21084 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21085 tmp = fieldFromInstruction(insn, 5, 5);
21086 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21089 tmp = fieldFromInstruction(insn, 0, 5);
21090 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21091 tmp = fieldFromInstruction(insn, 0, 5);
21092 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21093 tmp = fieldFromInstruction(insn, 5, 5);
21094 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21097 tmp = fieldFromInstruction(insn, 0, 5);
21098 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21099 tmp = fieldFromInstruction(insn, 5, 5);
21100 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21103 tmp = fieldFromInstruction(insn, 0, 5);
21104 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21105 tmp = fieldFromInstruction(insn, 0, 5);
21106 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21107 tmp = fieldFromInstruction(insn, 5, 5);
21108 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21111 tmp = fieldFromInstruction(insn, 0, 5);
21112 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21113 tmp = fieldFromInstruction(insn, 0, 5);
21114 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21115 tmp = fieldFromInstruction(insn, 5, 5);
21116 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21119 tmp = fieldFromInstruction(insn, 0, 5);
21120 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21121 tmp = fieldFromInstruction(insn, 5, 5);
21122 if (!Check(S, DecodeSImm<5>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21123 tmp = fieldFromInstruction(insn, 16, 5);
21124 if (!Check(S, DecodeSImm<5>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21127 tmp = fieldFromInstruction(insn, 0, 5);
21128 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21129 tmp = fieldFromInstruction(insn, 5, 5);
21130 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21131 tmp = fieldFromInstruction(insn, 16, 5);
21132 if (!Check(S, DecodeSImm<5>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21135 tmp = fieldFromInstruction(insn, 0, 5);
21136 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21137 tmp = fieldFromInstruction(insn, 5, 5);
21138 if (!Check(S, DecodeSImm<5>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21139 tmp = fieldFromInstruction(insn, 16, 5);
21140 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21143 tmp = fieldFromInstruction(insn, 0, 5);
21144 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21145 tmp = fieldFromInstruction(insn, 5, 5);
21146 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21147 tmp = fieldFromInstruction(insn, 16, 5);
21148 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21151 tmp = fieldFromInstruction(insn, 0, 5);
21152 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21153 tmp = fieldFromInstruction(insn, 16, 5);
21154 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21155 tmp = fieldFromInstruction(insn, 5, 6);
21156 if (!Check(S, DecodeSImm<6>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21159 tmp = fieldFromInstruction(insn, 0, 5);
21160 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21161 tmp = fieldFromInstruction(insn, 5, 6);
21162 if (!Check(S, DecodeSImm<6>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21165 tmp = fieldFromInstruction(insn, 0, 5);
21166 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21167 tmp = fieldFromInstruction(insn, 5, 5);
21168 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21169 tmp = fieldFromInstruction(insn, 16, 5);
21170 if (!Check(S, DecodeSImm<5>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21173 tmp = fieldFromInstruction(insn, 0, 5);
21174 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21175 tmp = fieldFromInstruction(insn, 5, 5);
21176 if (!Check(S, DecodeSImm<5>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21177 tmp = fieldFromInstruction(insn, 16, 5);
21178 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21181 tmp = fieldFromInstruction(insn, 0, 5);
21182 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21183 tmp = fieldFromInstruction(insn, 5, 5);
21184 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21185 tmp = fieldFromInstruction(insn, 16, 5);
21186 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21189 tmp = fieldFromInstruction(insn, 0, 4);
21190 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21191 tmp = fieldFromInstruction(insn, 5, 4);
21192 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21193 tmp = fieldFromInstruction(insn, 16, 4);
21194 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21197 tmp = fieldFromInstruction(insn, 0, 4);
21198 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21199 tmp = fieldFromInstruction(insn, 5, 4);
21200 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21203 tmp = fieldFromInstruction(insn, 0, 5);
21204 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21205 tmp = fieldFromInstruction(insn, 5, 5);
21206 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21207 tmp = fieldFromInstruction(insn, 16, 3);
21208 if (!Check(S, DecodeVecShiftR8Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21211 tmp = fieldFromInstruction(insn, 0, 5);
21212 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21213 tmp = fieldFromInstruction(insn, 5, 5);
21214 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21215 tmp = fieldFromInstruction(insn, 16, 4);
21216 if (!Check(S, DecodeVecShiftR16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21219 tmp = fieldFromInstruction(insn, 0, 5);
21220 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21221 tmp = fieldFromInstruction(insn, 5, 5);
21222 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21223 tmp = fieldFromInstruction(insn, 16, 5);
21224 if (!Check(S, DecodeVecShiftR32Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21227 tmp = fieldFromInstruction(insn, 0, 5);
21228 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21229 tmp = fieldFromInstruction(insn, 5, 5);
21230 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21231 tmp = fieldFromInstruction(insn, 16, 3);
21232 if (!Check(S, DecodeVecShiftL8Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21235 tmp = fieldFromInstruction(insn, 0, 5);
21236 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21237 tmp = fieldFromInstruction(insn, 5, 5);
21238 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21239 tmp = fieldFromInstruction(insn, 16, 4);
21240 if (!Check(S, DecodeVecShiftL16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21243 tmp = fieldFromInstruction(insn, 0, 5);
21244 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21245 tmp = fieldFromInstruction(insn, 5, 5);
21246 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21247 tmp = fieldFromInstruction(insn, 16, 5);
21248 if (!Check(S, DecodeVecShiftL32Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21251 tmp = fieldFromInstruction(insn, 0, 5);
21252 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21253 tmp = fieldFromInstruction(insn, 5, 5);
21254 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21255 tmp = 0x0;
21256 tmp |= fieldFromInstruction(insn, 16, 5) << 0;
21257 tmp |= fieldFromInstruction(insn, 22, 1) << 5;
21258 if (!Check(S, DecodeVecShiftR64Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21261 tmp = fieldFromInstruction(insn, 0, 5);
21262 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21263 tmp = fieldFromInstruction(insn, 5, 5);
21264 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21265 tmp = 0x0;
21266 tmp |= fieldFromInstruction(insn, 16, 5) << 0;
21267 tmp |= fieldFromInstruction(insn, 22, 1) << 5;
21268 if (!Check(S, DecodeVecShiftL64Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21271 tmp = fieldFromInstruction(insn, 0, 5);
21272 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21273 tmp = fieldFromInstruction(insn, 0, 5);
21274 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21275 tmp = fieldFromInstruction(insn, 10, 3);
21276 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21277 tmp = fieldFromInstruction(insn, 5, 5);
21278 if (!Check(S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21281 tmp = fieldFromInstruction(insn, 0, 5);
21282 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21283 tmp = fieldFromInstruction(insn, 0, 5);
21284 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21285 tmp = fieldFromInstruction(insn, 10, 3);
21286 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21287 tmp = fieldFromInstruction(insn, 5, 5);
21288 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21291 tmp = fieldFromInstruction(insn, 0, 5);
21292 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21293 tmp = fieldFromInstruction(insn, 10, 3);
21294 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21295 tmp = fieldFromInstruction(insn, 5, 5);
21296 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21299 tmp = fieldFromInstruction(insn, 0, 5);
21300 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21301 tmp = fieldFromInstruction(insn, 0, 5);
21302 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21303 tmp = fieldFromInstruction(insn, 10, 3);
21304 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21305 tmp = fieldFromInstruction(insn, 5, 5);
21306 if (!Check(S, DecodeGPR32spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21309 tmp = fieldFromInstruction(insn, 0, 5);
21310 if (!Check(S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21311 tmp = fieldFromInstruction(insn, 10, 3);
21312 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21313 tmp = fieldFromInstruction(insn, 0, 5);
21314 if (!Check(S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21315 tmp = fieldFromInstruction(insn, 5, 5);
21316 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21319 tmp = fieldFromInstruction(insn, 0, 5);
21320 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21321 tmp = fieldFromInstruction(insn, 10, 3);
21322 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21323 tmp = fieldFromInstruction(insn, 0, 5);
21324 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21325 tmp = fieldFromInstruction(insn, 5, 5);
21326 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21329 tmp = fieldFromInstruction(insn, 0, 5);
21330 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21331 tmp = fieldFromInstruction(insn, 10, 3);
21332 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21333 tmp = fieldFromInstruction(insn, 5, 5);
21334 if (!Check(S, DecodeZPR2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21337 tmp = fieldFromInstruction(insn, 0, 5);
21338 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21339 tmp = fieldFromInstruction(insn, 10, 3);
21340 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21341 tmp = fieldFromInstruction(insn, 0, 5);
21342 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21343 tmp = fieldFromInstruction(insn, 5, 5);
21344 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21347 tmp = fieldFromInstruction(insn, 0, 5);
21348 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21349 tmp = fieldFromInstruction(insn, 0, 5);
21350 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21351 tmp = fieldFromInstruction(insn, 10, 3);
21352 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21353 tmp = fieldFromInstruction(insn, 5, 5);
21354 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21357 tmp = fieldFromInstruction(insn, 0, 5);
21358 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21359 tmp = fieldFromInstruction(insn, 0, 5);
21360 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21361 tmp = fieldFromInstruction(insn, 10, 3);
21362 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21363 tmp = fieldFromInstruction(insn, 5, 5);
21364 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21367 tmp = fieldFromInstruction(insn, 0, 5);
21368 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21369 tmp = fieldFromInstruction(insn, 10, 3);
21370 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21371 tmp = fieldFromInstruction(insn, 5, 5);
21372 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21375 tmp = fieldFromInstruction(insn, 0, 5);
21376 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21377 tmp = fieldFromInstruction(insn, 0, 5);
21378 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21379 tmp = fieldFromInstruction(insn, 10, 3);
21380 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21381 tmp = fieldFromInstruction(insn, 5, 5);
21382 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21385 tmp = fieldFromInstruction(insn, 0, 5);
21386 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21387 tmp = fieldFromInstruction(insn, 10, 3);
21388 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21389 tmp = fieldFromInstruction(insn, 0, 5);
21390 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21391 tmp = fieldFromInstruction(insn, 5, 5);
21392 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21395 tmp = fieldFromInstruction(insn, 0, 5);
21396 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21397 tmp = fieldFromInstruction(insn, 10, 3);
21398 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21399 tmp = fieldFromInstruction(insn, 0, 5);
21400 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21401 tmp = fieldFromInstruction(insn, 5, 5);
21402 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21405 tmp = fieldFromInstruction(insn, 0, 5);
21406 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21407 tmp = fieldFromInstruction(insn, 10, 3);
21408 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21409 tmp = fieldFromInstruction(insn, 0, 5);
21410 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21411 tmp = fieldFromInstruction(insn, 5, 5);
21412 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21415 tmp = fieldFromInstruction(insn, 0, 5);
21416 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21417 tmp = fieldFromInstruction(insn, 5, 5);
21418 MI.addOperand(MCOperand::createImm(tmp));
21419 tmp = fieldFromInstruction(insn, 16, 4);
21420 if (!Check(S, DecodeSVEIncDecImm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21423 tmp = fieldFromInstruction(insn, 0, 5);
21424 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21425 tmp = fieldFromInstruction(insn, 0, 5);
21426 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21427 tmp = fieldFromInstruction(insn, 5, 5);
21428 MI.addOperand(MCOperand::createImm(tmp));
21429 tmp = fieldFromInstruction(insn, 16, 4);
21430 if (!Check(S, DecodeSVEIncDecImm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21433 tmp = fieldFromInstruction(insn, 0, 5);
21434 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21435 tmp = fieldFromInstruction(insn, 0, 5);
21436 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21437 tmp = fieldFromInstruction(insn, 5, 5);
21438 MI.addOperand(MCOperand::createImm(tmp));
21439 tmp = fieldFromInstruction(insn, 16, 4);
21440 if (!Check(S, DecodeSVEIncDecImm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21443 tmp = fieldFromInstruction(insn, 0, 5);
21444 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21445 tmp = fieldFromInstruction(insn, 0, 5);
21446 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21447 tmp = fieldFromInstruction(insn, 5, 5);
21448 MI.addOperand(MCOperand::createImm(tmp));
21449 tmp = fieldFromInstruction(insn, 16, 4);
21450 if (!Check(S, DecodeSVEIncDecImm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21453 tmp = fieldFromInstruction(insn, 0, 5);
21454 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21455 tmp = fieldFromInstruction(insn, 10, 4);
21456 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21457 tmp = fieldFromInstruction(insn, 5, 5);
21458 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21459 tmp = fieldFromInstruction(insn, 16, 5);
21460 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21463 tmp = fieldFromInstruction(insn, 0, 4);
21464 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21465 tmp = fieldFromInstruction(insn, 10, 3);
21466 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21467 tmp = fieldFromInstruction(insn, 5, 5);
21468 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21469 tmp = fieldFromInstruction(insn, 16, 5);
21470 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21473 tmp = fieldFromInstruction(insn, 0, 4);
21474 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21475 tmp = fieldFromInstruction(insn, 10, 3);
21476 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21477 tmp = fieldFromInstruction(insn, 5, 5);
21478 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21479 tmp = fieldFromInstruction(insn, 14, 7);
21480 MI.addOperand(MCOperand::createImm(tmp));
21483 tmp = fieldFromInstruction(insn, 0, 4);
21484 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21485 tmp = fieldFromInstruction(insn, 10, 3);
21486 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21487 tmp = fieldFromInstruction(insn, 5, 5);
21488 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21489 tmp = fieldFromInstruction(insn, 16, 5);
21490 if (!Check(S, DecodeSImm<5>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21493 tmp = fieldFromInstruction(insn, 0, 4);
21494 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21495 tmp = fieldFromInstruction(insn, 10, 4);
21496 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21497 tmp = fieldFromInstruction(insn, 5, 4);
21498 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21499 tmp = fieldFromInstruction(insn, 16, 4);
21500 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21503 tmp = fieldFromInstruction(insn, 0, 4);
21504 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21505 tmp = fieldFromInstruction(insn, 10, 4);
21506 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21507 tmp = fieldFromInstruction(insn, 5, 4);
21508 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21511 tmp = fieldFromInstruction(insn, 0, 4);
21512 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21513 tmp = fieldFromInstruction(insn, 10, 4);
21514 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21515 tmp = fieldFromInstruction(insn, 5, 4);
21516 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21517 tmp = fieldFromInstruction(insn, 0, 4);
21518 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21521 tmp = fieldFromInstruction(insn, 0, 4);
21522 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21523 tmp = fieldFromInstruction(insn, 0, 4);
21524 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21525 tmp = fieldFromInstruction(insn, 10, 4);
21526 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21527 tmp = fieldFromInstruction(insn, 5, 4);
21528 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21531 tmp = fieldFromInstruction(insn, 0, 4);
21532 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21533 tmp = fieldFromInstruction(insn, 5, 4);
21534 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21535 tmp = fieldFromInstruction(insn, 0, 4);
21536 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21539 tmp = fieldFromInstruction(insn, 0, 4);
21540 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21541 tmp = fieldFromInstruction(insn, 5, 5);
21542 MI.addOperand(MCOperand::createImm(tmp));
21545 tmp = fieldFromInstruction(insn, 0, 4);
21546 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21549 tmp = fieldFromInstruction(insn, 0, 4);
21550 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21551 tmp = fieldFromInstruction(insn, 5, 5);
21552 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21553 tmp = fieldFromInstruction(insn, 16, 5);
21554 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21557 tmp = fieldFromInstruction(insn, 0, 4);
21558 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21559 tmp = fieldFromInstruction(insn, 5, 5);
21560 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21561 tmp = fieldFromInstruction(insn, 16, 5);
21562 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21565 tmp = fieldFromInstruction(insn, 0, 5);
21566 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21567 tmp = fieldFromInstruction(insn, 10, 4);
21568 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21569 tmp = fieldFromInstruction(insn, 5, 4);
21570 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21573 tmp = fieldFromInstruction(insn, 0, 5);
21574 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21575 tmp = fieldFromInstruction(insn, 5, 4);
21576 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21577 tmp = fieldFromInstruction(insn, 0, 5);
21578 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21581 tmp = fieldFromInstruction(insn, 5, 4);
21582 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21585 tmp = fieldFromInstruction(insn, 0, 5);
21586 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21587 tmp = fieldFromInstruction(insn, 5, 4);
21588 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21589 tmp = fieldFromInstruction(insn, 0, 5);
21590 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21595 tmp = fieldFromInstruction(insn, 0, 5);
21596 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21597 tmp = fieldFromInstruction(insn, 0, 5);
21598 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21599 tmp = fieldFromInstruction(insn, 5, 9);
21600 if (!Check(S, DecodeImm8OptLsl<8>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21603 tmp = fieldFromInstruction(insn, 0, 5);
21604 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21605 tmp = fieldFromInstruction(insn, 0, 5);
21606 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21607 tmp = fieldFromInstruction(insn, 5, 8);
21608 if (!Check(S, DecodeSImm<8>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21611 tmp = fieldFromInstruction(insn, 0, 5);
21612 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21613 tmp = fieldFromInstruction(insn, 0, 5);
21614 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21615 tmp = fieldFromInstruction(insn, 5, 8);
21616 MI.addOperand(MCOperand::createImm(tmp));
21619 tmp = fieldFromInstruction(insn, 0, 5);
21620 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21621 tmp = fieldFromInstruction(insn, 5, 9);
21622 if (!Check(S, DecodeImm8OptLsl<8>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21625 tmp = fieldFromInstruction(insn, 10, 4);
21626 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21627 tmp = fieldFromInstruction(insn, 5, 4);
21628 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21631 tmp = fieldFromInstruction(insn, 0, 5);
21632 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21633 tmp = fieldFromInstruction(insn, 0, 5);
21634 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21635 tmp = fieldFromInstruction(insn, 5, 4);
21636 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21639 tmp = fieldFromInstruction(insn, 0, 5);
21640 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21641 tmp = fieldFromInstruction(insn, 0, 5);
21642 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21643 tmp = fieldFromInstruction(insn, 5, 9);
21644 if (!Check(S, DecodeImm8OptLsl<16>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21647 tmp = fieldFromInstruction(insn, 0, 5);
21648 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21649 tmp = fieldFromInstruction(insn, 5, 9);
21650 if (!Check(S, DecodeImm8OptLsl<16>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21653 tmp = fieldFromInstruction(insn, 0, 5);
21654 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21655 tmp = fieldFromInstruction(insn, 5, 8);
21656 MI.addOperand(MCOperand::createImm(tmp));
21659 tmp = fieldFromInstruction(insn, 5, 5);
21660 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21661 tmp = fieldFromInstruction(insn, 16, 5);
21662 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21665 tmp = fieldFromInstruction(insn, 0, 5);
21666 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21667 tmp = fieldFromInstruction(insn, 0, 5);
21668 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21669 tmp = fieldFromInstruction(insn, 5, 9);
21670 if (!Check(S, DecodeImm8OptLsl<32>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21673 tmp = fieldFromInstruction(insn, 0, 5);
21674 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21675 tmp = fieldFromInstruction(insn, 5, 9);
21676 if (!Check(S, DecodeImm8OptLsl<32>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21679 tmp = fieldFromInstruction(insn, 5, 5);
21680 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21681 tmp = fieldFromInstruction(insn, 16, 5);
21682 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21685 tmp = fieldFromInstruction(insn, 0, 5);
21686 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21687 tmp = fieldFromInstruction(insn, 0, 5);
21688 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21689 tmp = fieldFromInstruction(insn, 5, 9);
21690 if (!Check(S, DecodeImm8OptLsl<64>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21693 tmp = fieldFromInstruction(insn, 0, 5);
21694 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21695 tmp = fieldFromInstruction(insn, 5, 9);
21696 if (!Check(S, DecodeImm8OptLsl<64>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21699 tmp = fieldFromInstruction(insn, 0, 5);
21700 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21701 tmp = fieldFromInstruction(insn, 0, 5);
21702 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21703 tmp = fieldFromInstruction(insn, 5, 5);
21704 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21705 tmp = fieldFromInstruction(insn, 16, 3);
21706 if (!Check(S, DecodeZPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21707 tmp = 0x0;
21708 tmp |= fieldFromInstruction(insn, 19, 2) << 0;
21709 tmp |= fieldFromInstruction(insn, 22, 1) << 2;
21710 MI.addOperand(MCOperand::createImm(tmp));
21713 tmp = fieldFromInstruction(insn, 0, 5);
21714 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21715 tmp = fieldFromInstruction(insn, 0, 5);
21716 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21717 tmp = fieldFromInstruction(insn, 5, 5);
21718 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21719 tmp = fieldFromInstruction(insn, 16, 5);
21720 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21721 tmp = fieldFromInstruction(insn, 10, 2);
21722 MI.addOperand(MCOperand::createImm(tmp));
21725 tmp = fieldFromInstruction(insn, 0, 5);
21726 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21727 tmp = fieldFromInstruction(insn, 0, 5);
21728 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21729 tmp = fieldFromInstruction(insn, 5, 5);
21730 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21731 tmp = fieldFromInstruction(insn, 16, 3);
21732 if (!Check(S, DecodeZPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21733 tmp = fieldFromInstruction(insn, 19, 2);
21734 MI.addOperand(MCOperand::createImm(tmp));
21737 tmp = fieldFromInstruction(insn, 0, 5);
21738 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21739 tmp = fieldFromInstruction(insn, 0, 5);
21740 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21741 tmp = fieldFromInstruction(insn, 5, 5);
21742 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21743 tmp = fieldFromInstruction(insn, 16, 4);
21744 if (!Check(S, DecodeZPR_4bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21745 tmp = fieldFromInstruction(insn, 20, 1);
21746 MI.addOperand(MCOperand::createImm(tmp));
21749 tmp = fieldFromInstruction(insn, 0, 5);
21750 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21751 tmp = fieldFromInstruction(insn, 0, 5);
21752 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21753 tmp = fieldFromInstruction(insn, 5, 5);
21754 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21755 tmp = fieldFromInstruction(insn, 16, 3);
21756 if (!Check(S, DecodeZPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21757 tmp = 0x0;
21758 tmp |= fieldFromInstruction(insn, 11, 1) << 0;
21759 tmp |= fieldFromInstruction(insn, 19, 2) << 1;
21760 MI.addOperand(MCOperand::createImm(tmp));
21763 tmp = fieldFromInstruction(insn, 0, 5);
21764 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21765 tmp = fieldFromInstruction(insn, 0, 5);
21766 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21767 tmp = fieldFromInstruction(insn, 5, 5);
21768 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21769 tmp = fieldFromInstruction(insn, 16, 4);
21770 if (!Check(S, DecodeZPR_4bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21771 tmp = 0x0;
21772 tmp |= fieldFromInstruction(insn, 11, 1) << 0;
21773 tmp |= fieldFromInstruction(insn, 20, 1) << 1;
21774 MI.addOperand(MCOperand::createImm(tmp));
21777 tmp = fieldFromInstruction(insn, 0, 5);
21778 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21779 tmp = fieldFromInstruction(insn, 0, 5);
21780 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21781 tmp = fieldFromInstruction(insn, 5, 5);
21782 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21783 tmp = fieldFromInstruction(insn, 16, 3);
21784 if (!Check(S, DecodeZPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21785 tmp = fieldFromInstruction(insn, 19, 2);
21786 MI.addOperand(MCOperand::createImm(tmp));
21787 tmp = fieldFromInstruction(insn, 10, 2);
21788 MI.addOperand(MCOperand::createImm(tmp));
21791 tmp = fieldFromInstruction(insn, 0, 5);
21792 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21793 tmp = fieldFromInstruction(insn, 0, 5);
21794 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21795 tmp = fieldFromInstruction(insn, 5, 5);
21796 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21797 tmp = fieldFromInstruction(insn, 16, 4);
21798 if (!Check(S, DecodeZPR_4bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21799 tmp = fieldFromInstruction(insn, 20, 1);
21800 MI.addOperand(MCOperand::createImm(tmp));
21801 tmp = fieldFromInstruction(insn, 10, 2);
21802 MI.addOperand(MCOperand::createImm(tmp));
21805 tmp = fieldFromInstruction(insn, 0, 5);
21806 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21807 tmp = fieldFromInstruction(insn, 0, 5);
21808 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21809 tmp = fieldFromInstruction(insn, 5, 5);
21810 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21813 tmp = fieldFromInstruction(insn, 0, 5);
21814 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21815 tmp = fieldFromInstruction(insn, 5, 5);
21816 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21817 tmp = fieldFromInstruction(insn, 16, 3);
21818 if (!Check(S, DecodeZPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21819 tmp = 0x0;
21820 tmp |= fieldFromInstruction(insn, 11, 1) << 0;
21821 tmp |= fieldFromInstruction(insn, 19, 2) << 1;
21822 MI.addOperand(MCOperand::createImm(tmp));
21825 tmp = fieldFromInstruction(insn, 0, 5);
21826 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21827 tmp = fieldFromInstruction(insn, 5, 5);
21828 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21829 tmp = fieldFromInstruction(insn, 16, 4);
21830 if (!Check(S, DecodeZPR_4bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21831 tmp = 0x0;
21832 tmp |= fieldFromInstruction(insn, 11, 1) << 0;
21833 tmp |= fieldFromInstruction(insn, 20, 1) << 1;
21834 MI.addOperand(MCOperand::createImm(tmp));
21837 tmp = fieldFromInstruction(insn, 0, 5);
21838 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21839 tmp = fieldFromInstruction(insn, 0, 5);
21840 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21841 tmp = fieldFromInstruction(insn, 5, 5);
21842 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21843 tmp = fieldFromInstruction(insn, 10, 1);
21844 MI.addOperand(MCOperand::createImm(tmp));
21847 tmp = fieldFromInstruction(insn, 0, 5);
21848 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21849 tmp = fieldFromInstruction(insn, 10, 3);
21850 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21851 tmp = fieldFromInstruction(insn, 5, 5);
21852 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21853 tmp = fieldFromInstruction(insn, 16, 5);
21854 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21857 tmp = fieldFromInstruction(insn, 0, 5);
21858 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21859 tmp = fieldFromInstruction(insn, 5, 5);
21860 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21861 tmp = fieldFromInstruction(insn, 16, 3);
21862 if (!Check(S, DecodeZPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21863 tmp = 0x0;
21864 tmp |= fieldFromInstruction(insn, 19, 2) << 0;
21865 tmp |= fieldFromInstruction(insn, 22, 1) << 2;
21866 MI.addOperand(MCOperand::createImm(tmp));
21869 tmp = fieldFromInstruction(insn, 0, 5);
21870 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21871 tmp = fieldFromInstruction(insn, 5, 5);
21872 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21873 tmp = fieldFromInstruction(insn, 16, 3);
21874 if (!Check(S, DecodeZPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21875 tmp = fieldFromInstruction(insn, 19, 2);
21876 MI.addOperand(MCOperand::createImm(tmp));
21879 tmp = fieldFromInstruction(insn, 0, 5);
21880 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21881 tmp = fieldFromInstruction(insn, 5, 5);
21882 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21883 tmp = fieldFromInstruction(insn, 16, 4);
21884 if (!Check(S, DecodeZPR_4bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21885 tmp = fieldFromInstruction(insn, 20, 1);
21886 MI.addOperand(MCOperand::createImm(tmp));
21889 tmp = fieldFromInstruction(insn, 0, 5);
21890 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21891 tmp = fieldFromInstruction(insn, 0, 5);
21892 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21895 tmp = fieldFromInstruction(insn, 0, 5);
21896 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21897 tmp = fieldFromInstruction(insn, 0, 5);
21898 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21899 tmp = fieldFromInstruction(insn, 5, 5);
21900 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21901 tmp = fieldFromInstruction(insn, 16, 3);
21902 if (!Check(S, DecodeVecShiftL8Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21905 tmp = fieldFromInstruction(insn, 0, 5);
21906 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21907 tmp = fieldFromInstruction(insn, 0, 5);
21908 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21909 tmp = fieldFromInstruction(insn, 5, 5);
21910 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21911 tmp = fieldFromInstruction(insn, 16, 4);
21912 if (!Check(S, DecodeVecShiftL16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21915 tmp = fieldFromInstruction(insn, 0, 5);
21916 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21917 tmp = fieldFromInstruction(insn, 0, 5);
21918 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21919 tmp = fieldFromInstruction(insn, 5, 5);
21920 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21921 tmp = fieldFromInstruction(insn, 16, 5);
21922 if (!Check(S, DecodeVecShiftL32Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21925 tmp = fieldFromInstruction(insn, 0, 5);
21926 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21927 tmp = fieldFromInstruction(insn, 0, 5);
21928 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21929 tmp = fieldFromInstruction(insn, 5, 5);
21930 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21931 tmp = 0x0;
21932 tmp |= fieldFromInstruction(insn, 16, 5) << 0;
21933 tmp |= fieldFromInstruction(insn, 22, 1) << 5;
21934 if (!Check(S, DecodeVecShiftL64Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21937 tmp = fieldFromInstruction(insn, 0, 5);
21938 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21939 tmp = fieldFromInstruction(insn, 10, 3);
21940 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21941 tmp = fieldFromInstruction(insn, 0, 5);
21942 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21943 tmp = fieldFromInstruction(insn, 5, 5);
21944 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21945 tmp = fieldFromInstruction(insn, 16, 5);
21946 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21947 tmp = fieldFromInstruction(insn, 13, 2);
21948 MI.addOperand(MCOperand::createImm(tmp));
21951 tmp = fieldFromInstruction(insn, 0, 5);
21952 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21953 tmp = fieldFromInstruction(insn, 10, 3);
21954 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21955 tmp = fieldFromInstruction(insn, 0, 5);
21956 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21957 tmp = fieldFromInstruction(insn, 5, 5);
21958 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21959 tmp = fieldFromInstruction(insn, 16, 1);
21960 MI.addOperand(MCOperand::createImm(tmp));
21963 tmp = fieldFromInstruction(insn, 0, 4);
21964 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21965 tmp = fieldFromInstruction(insn, 10, 3);
21966 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21967 tmp = fieldFromInstruction(insn, 5, 5);
21968 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21971 tmp = fieldFromInstruction(insn, 0, 5);
21972 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21973 tmp = fieldFromInstruction(insn, 0, 5);
21974 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21975 tmp = fieldFromInstruction(insn, 5, 5);
21976 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21977 tmp = fieldFromInstruction(insn, 16, 3);
21978 MI.addOperand(MCOperand::createImm(tmp));
21981 tmp = fieldFromInstruction(insn, 0, 5);
21982 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21983 tmp = fieldFromInstruction(insn, 10, 3);
21984 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21985 tmp = fieldFromInstruction(insn, 0, 5);
21986 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21987 tmp = fieldFromInstruction(insn, 5, 1);
21988 MI.addOperand(MCOperand::createImm(tmp));
21991 tmp = fieldFromInstruction(insn, 0, 5);
21992 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21993 tmp = fieldFromInstruction(insn, 10, 3);
21994 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21995 tmp = fieldFromInstruction(insn, 5, 5);
21996 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
21997 tmp = fieldFromInstruction(insn, 16, 5);
21998 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22001 tmp = fieldFromInstruction(insn, 0, 4);
22002 MI.addOperand(MCOperand::createImm(tmp));
22003 tmp = fieldFromInstruction(insn, 10, 3);
22004 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22005 tmp = fieldFromInstruction(insn, 5, 5);
22006 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22007 tmp = fieldFromInstruction(insn, 16, 5);
22008 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22011 tmp = fieldFromInstruction(insn, 0, 4);
22012 if (!Check(S, DecodePPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22013 tmp = fieldFromInstruction(insn, 5, 5);
22014 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22015 tmp = 0x0;
22016 tmp |= fieldFromInstruction(insn, 10, 3) << 0;
22017 tmp |= fieldFromInstruction(insn, 16, 6) << 3;
22018 if (!Check(S, DecodeSImm<9>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22021 tmp = fieldFromInstruction(insn, 0, 4);
22022 MI.addOperand(MCOperand::createImm(tmp));
22023 tmp = fieldFromInstruction(insn, 10, 3);
22024 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22025 tmp = fieldFromInstruction(insn, 5, 5);
22026 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22027 tmp = fieldFromInstruction(insn, 16, 6);
22028 if (!Check(S, DecodeSImm<6>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22031 tmp = fieldFromInstruction(insn, 0, 5);
22032 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22033 tmp = fieldFromInstruction(insn, 5, 5);
22034 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22035 tmp = 0x0;
22036 tmp |= fieldFromInstruction(insn, 10, 3) << 0;
22037 tmp |= fieldFromInstruction(insn, 16, 6) << 3;
22038 if (!Check(S, DecodeSImm<9>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22041 tmp = fieldFromInstruction(insn, 0, 5);
22042 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22043 tmp = fieldFromInstruction(insn, 10, 3);
22044 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22045 tmp = fieldFromInstruction(insn, 5, 5);
22046 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22047 tmp = fieldFromInstruction(insn, 16, 5);
22048 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22051 tmp = fieldFromInstruction(insn, 0, 5);
22052 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22053 tmp = fieldFromInstruction(insn, 10, 3);
22054 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22055 tmp = fieldFromInstruction(insn, 5, 5);
22056 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22057 tmp = fieldFromInstruction(insn, 16, 5);
22058 MI.addOperand(MCOperand::createImm(tmp));
22061 tmp = fieldFromInstruction(insn, 0, 5);
22062 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22063 tmp = fieldFromInstruction(insn, 10, 3);
22064 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22065 tmp = fieldFromInstruction(insn, 5, 5);
22066 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22067 tmp = fieldFromInstruction(insn, 16, 6);
22068 MI.addOperand(MCOperand::createImm(tmp));
22071 tmp = fieldFromInstruction(insn, 0, 4);
22072 MI.addOperand(MCOperand::createImm(tmp));
22073 tmp = fieldFromInstruction(insn, 10, 3);
22074 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22075 tmp = fieldFromInstruction(insn, 5, 5);
22076 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22077 tmp = fieldFromInstruction(insn, 16, 5);
22078 if (!Check(S, DecodeGPR64commonRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22081 tmp = fieldFromInstruction(insn, 0, 4);
22082 MI.addOperand(MCOperand::createImm(tmp));
22083 tmp = fieldFromInstruction(insn, 10, 3);
22084 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22085 tmp = fieldFromInstruction(insn, 5, 5);
22086 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22087 tmp = fieldFromInstruction(insn, 16, 5);
22088 MI.addOperand(MCOperand::createImm(tmp));
22091 tmp = fieldFromInstruction(insn, 0, 5);
22092 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22093 tmp = fieldFromInstruction(insn, 10, 3);
22094 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22095 tmp = fieldFromInstruction(insn, 5, 5);
22096 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22097 tmp = fieldFromInstruction(insn, 16, 5);
22098 if (!Check(S, DecodeGPR64commonRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22101 tmp = fieldFromInstruction(insn, 0, 5);
22102 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22103 tmp = fieldFromInstruction(insn, 10, 3);
22104 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22105 tmp = fieldFromInstruction(insn, 5, 5);
22106 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22107 tmp = fieldFromInstruction(insn, 16, 4);
22108 if (!Check(S, DecodeSImm<4>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22111 tmp = fieldFromInstruction(insn, 0, 5);
22112 if (!Check(S, DecodeZPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22113 tmp = fieldFromInstruction(insn, 10, 3);
22114 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22115 tmp = fieldFromInstruction(insn, 5, 5);
22116 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22117 tmp = fieldFromInstruction(insn, 16, 5);
22118 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22121 tmp = fieldFromInstruction(insn, 0, 5);
22122 if (!Check(S, DecodeZPR2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22123 tmp = fieldFromInstruction(insn, 10, 3);
22124 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22125 tmp = fieldFromInstruction(insn, 5, 5);
22126 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22127 tmp = fieldFromInstruction(insn, 16, 5);
22128 if (!Check(S, DecodeGPR64commonRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22131 tmp = fieldFromInstruction(insn, 0, 5);
22132 if (!Check(S, DecodeZPR2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22133 tmp = fieldFromInstruction(insn, 10, 3);
22134 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22135 tmp = fieldFromInstruction(insn, 5, 5);
22136 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22137 tmp = fieldFromInstruction(insn, 16, 4);
22138 if (!Check(S, DecodeSImm<4>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22141 tmp = fieldFromInstruction(insn, 0, 5);
22142 if (!Check(S, DecodeZPR3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22143 tmp = fieldFromInstruction(insn, 10, 3);
22144 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22145 tmp = fieldFromInstruction(insn, 5, 5);
22146 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22147 tmp = fieldFromInstruction(insn, 16, 5);
22148 if (!Check(S, DecodeGPR64commonRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22151 tmp = fieldFromInstruction(insn, 0, 5);
22152 if (!Check(S, DecodeZPR3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22153 tmp = fieldFromInstruction(insn, 10, 3);
22154 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22155 tmp = fieldFromInstruction(insn, 5, 5);
22156 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22157 tmp = fieldFromInstruction(insn, 16, 4);
22158 if (!Check(S, DecodeSImm<4>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22161 tmp = fieldFromInstruction(insn, 0, 5);
22162 if (!Check(S, DecodeZPR4RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22163 tmp = fieldFromInstruction(insn, 10, 3);
22164 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22165 tmp = fieldFromInstruction(insn, 5, 5);
22166 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22167 tmp = fieldFromInstruction(insn, 16, 5);
22168 if (!Check(S, DecodeGPR64commonRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22171 tmp = fieldFromInstruction(insn, 0, 5);
22172 if (!Check(S, DecodeZPR4RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22173 tmp = fieldFromInstruction(insn, 10, 3);
22174 if (!Check(S, DecodePPR_3bRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22175 tmp = fieldFromInstruction(insn, 5, 5);
22176 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22177 tmp = fieldFromInstruction(insn, 16, 4);
22178 if (!Check(S, DecodeSImm<4>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22184 tmp = fieldFromInstruction(insn, 16, 5);
22185 if (!Check(S, DecodeWSeqPairsClassRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22186 tmp = fieldFromInstruction(insn, 16, 5);
22187 if (!Check(S, DecodeWSeqPairsClassRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22188 tmp = fieldFromInstruction(insn, 0, 5);
22189 if (!Check(S, DecodeWSeqPairsClassRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22190 tmp = fieldFromInstruction(insn, 5, 5);
22191 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22194 tmp = fieldFromInstruction(insn, 16, 5);
22195 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22196 tmp = fieldFromInstruction(insn, 16, 5);
22197 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22198 tmp = fieldFromInstruction(insn, 0, 5);
22199 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22200 tmp = fieldFromInstruction(insn, 5, 5);
22201 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22213 tmp = fieldFromInstruction(insn, 16, 5);
22214 if (!Check(S, DecodeXSeqPairsClassRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22215 tmp = fieldFromInstruction(insn, 16, 5);
22216 if (!Check(S, DecodeXSeqPairsClassRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22217 tmp = fieldFromInstruction(insn, 0, 5);
22218 if (!Check(S, DecodeXSeqPairsClassRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22219 tmp = fieldFromInstruction(insn, 5, 5);
22220 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22223 tmp = fieldFromInstruction(insn, 16, 5);
22224 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22225 tmp = fieldFromInstruction(insn, 16, 5);
22226 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22227 tmp = fieldFromInstruction(insn, 0, 5);
22228 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22229 tmp = fieldFromInstruction(insn, 5, 5);
22230 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22233 tmp = fieldFromInstruction(insn, 0, 5);
22234 if (!Check(S, DecodeDDDDRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22235 tmp = fieldFromInstruction(insn, 5, 5);
22236 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22239 tmp = fieldFromInstruction(insn, 0, 5);
22240 if (!Check(S, DecodeDDDRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22241 tmp = fieldFromInstruction(insn, 5, 5);
22242 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22245 tmp = fieldFromInstruction(insn, 0, 5);
22246 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22247 tmp = fieldFromInstruction(insn, 5, 5);
22248 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22251 tmp = fieldFromInstruction(insn, 0, 5);
22252 if (!Check(S, DecodeDDRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22253 tmp = fieldFromInstruction(insn, 5, 5);
22254 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22257 tmp = fieldFromInstruction(insn, 0, 5);
22258 if (!Check(S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22259 tmp = fieldFromInstruction(insn, 5, 5);
22260 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22263 tmp = fieldFromInstruction(insn, 0, 5);
22264 if (!Check(S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22265 tmp = fieldFromInstruction(insn, 5, 5);
22266 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22269 tmp = fieldFromInstruction(insn, 0, 5);
22270 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22271 tmp = fieldFromInstruction(insn, 5, 5);
22272 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22275 tmp = fieldFromInstruction(insn, 0, 5);
22276 if (!Check(S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22277 tmp = fieldFromInstruction(insn, 5, 5);
22278 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22281 tmp = fieldFromInstruction(insn, 5, 5);
22282 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22283 tmp = fieldFromInstruction(insn, 0, 5);
22284 if (!Check(S, DecodeDDDDRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22285 tmp = fieldFromInstruction(insn, 5, 5);
22286 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22287 tmp = fieldFromInstruction(insn, 16, 5);
22288 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22291 tmp = fieldFromInstruction(insn, 5, 5);
22292 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22293 tmp = fieldFromInstruction(insn, 0, 5);
22294 if (!Check(S, DecodeDDDRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22295 tmp = fieldFromInstruction(insn, 5, 5);
22296 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22297 tmp = fieldFromInstruction(insn, 16, 5);
22298 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22301 tmp = fieldFromInstruction(insn, 5, 5);
22302 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22303 tmp = fieldFromInstruction(insn, 0, 5);
22304 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22305 tmp = fieldFromInstruction(insn, 5, 5);
22306 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22307 tmp = fieldFromInstruction(insn, 16, 5);
22308 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22311 tmp = fieldFromInstruction(insn, 5, 5);
22312 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22313 tmp = fieldFromInstruction(insn, 0, 5);
22314 if (!Check(S, DecodeDDRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22315 tmp = fieldFromInstruction(insn, 5, 5);
22316 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22317 tmp = fieldFromInstruction(insn, 16, 5);
22318 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22321 tmp = fieldFromInstruction(insn, 5, 5);
22322 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22323 tmp = fieldFromInstruction(insn, 0, 5);
22324 if (!Check(S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22325 tmp = fieldFromInstruction(insn, 5, 5);
22326 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22327 tmp = fieldFromInstruction(insn, 16, 5);
22328 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22331 tmp = fieldFromInstruction(insn, 5, 5);
22332 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22333 tmp = fieldFromInstruction(insn, 0, 5);
22334 if (!Check(S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22335 tmp = fieldFromInstruction(insn, 5, 5);
22336 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22337 tmp = fieldFromInstruction(insn, 16, 5);
22338 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22341 tmp = fieldFromInstruction(insn, 5, 5);
22342 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22343 tmp = fieldFromInstruction(insn, 0, 5);
22344 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22345 tmp = fieldFromInstruction(insn, 5, 5);
22346 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22347 tmp = fieldFromInstruction(insn, 16, 5);
22348 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22351 tmp = fieldFromInstruction(insn, 5, 5);
22352 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22353 tmp = fieldFromInstruction(insn, 0, 5);
22354 if (!Check(S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22355 tmp = fieldFromInstruction(insn, 5, 5);
22356 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22357 tmp = fieldFromInstruction(insn, 16, 5);
22358 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22361 tmp = fieldFromInstruction(insn, 0, 5);
22362 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22363 tmp = 0x0;
22364 tmp |= fieldFromInstruction(insn, 10, 3) << 0;
22365 tmp |= fieldFromInstruction(insn, 30, 1) << 3;
22366 MI.addOperand(MCOperand::createImm(tmp));
22367 tmp = fieldFromInstruction(insn, 5, 5);
22368 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22371 tmp = fieldFromInstruction(insn, 0, 5);
22372 if (!Check(S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22373 tmp = 0x0;
22374 tmp |= fieldFromInstruction(insn, 10, 3) << 0;
22375 tmp |= fieldFromInstruction(insn, 30, 1) << 3;
22376 MI.addOperand(MCOperand::createImm(tmp));
22377 tmp = fieldFromInstruction(insn, 5, 5);
22378 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22381 tmp = fieldFromInstruction(insn, 0, 5);
22382 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22383 tmp = 0x0;
22384 tmp |= fieldFromInstruction(insn, 11, 2) << 0;
22385 tmp |= fieldFromInstruction(insn, 30, 1) << 2;
22386 MI.addOperand(MCOperand::createImm(tmp));
22387 tmp = fieldFromInstruction(insn, 5, 5);
22388 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22391 tmp = fieldFromInstruction(insn, 0, 5);
22392 if (!Check(S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22393 tmp = 0x0;
22394 tmp |= fieldFromInstruction(insn, 11, 2) << 0;
22395 tmp |= fieldFromInstruction(insn, 30, 1) << 2;
22396 MI.addOperand(MCOperand::createImm(tmp));
22397 tmp = fieldFromInstruction(insn, 5, 5);
22398 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22401 tmp = fieldFromInstruction(insn, 0, 5);
22402 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22403 tmp = 0x0;
22404 tmp |= fieldFromInstruction(insn, 12, 1) << 0;
22405 tmp |= fieldFromInstruction(insn, 30, 1) << 1;
22406 MI.addOperand(MCOperand::createImm(tmp));
22407 tmp = fieldFromInstruction(insn, 5, 5);
22408 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22411 tmp = fieldFromInstruction(insn, 0, 5);
22412 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22413 tmp = fieldFromInstruction(insn, 30, 1);
22414 MI.addOperand(MCOperand::createImm(tmp));
22415 tmp = fieldFromInstruction(insn, 5, 5);
22416 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22419 tmp = fieldFromInstruction(insn, 0, 5);
22420 if (!Check(S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22421 tmp = 0x0;
22422 tmp |= fieldFromInstruction(insn, 12, 1) << 0;
22423 tmp |= fieldFromInstruction(insn, 30, 1) << 1;
22424 MI.addOperand(MCOperand::createImm(tmp));
22425 tmp = fieldFromInstruction(insn, 5, 5);
22426 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22429 tmp = fieldFromInstruction(insn, 0, 5);
22430 if (!Check(S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22431 tmp = fieldFromInstruction(insn, 30, 1);
22432 MI.addOperand(MCOperand::createImm(tmp));
22433 tmp = fieldFromInstruction(insn, 5, 5);
22434 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22437 tmp = fieldFromInstruction(insn, 0, 5);
22438 if (!Check(S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22439 tmp = 0x0;
22440 tmp |= fieldFromInstruction(insn, 10, 3) << 0;
22441 tmp |= fieldFromInstruction(insn, 30, 1) << 3;
22442 MI.addOperand(MCOperand::createImm(tmp));
22443 tmp = fieldFromInstruction(insn, 5, 5);
22444 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22447 tmp = fieldFromInstruction(insn, 0, 5);
22448 if (!Check(S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22449 tmp = 0x0;
22450 tmp |= fieldFromInstruction(insn, 10, 3) << 0;
22451 tmp |= fieldFromInstruction(insn, 30, 1) << 3;
22452 MI.addOperand(MCOperand::createImm(tmp));
22453 tmp = fieldFromInstruction(insn, 5, 5);
22454 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22457 tmp = fieldFromInstruction(insn, 0, 5);
22458 if (!Check(S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22459 tmp = 0x0;
22460 tmp |= fieldFromInstruction(insn, 11, 2) << 0;
22461 tmp |= fieldFromInstruction(insn, 30, 1) << 2;
22462 MI.addOperand(MCOperand::createImm(tmp));
22463 tmp = fieldFromInstruction(insn, 5, 5);
22464 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22467 tmp = fieldFromInstruction(insn, 0, 5);
22468 if (!Check(S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22469 tmp = 0x0;
22470 tmp |= fieldFromInstruction(insn, 11, 2) << 0;
22471 tmp |= fieldFromInstruction(insn, 30, 1) << 2;
22472 MI.addOperand(MCOperand::createImm(tmp));
22473 tmp = fieldFromInstruction(insn, 5, 5);
22474 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22477 tmp = fieldFromInstruction(insn, 0, 5);
22478 if (!Check(S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22479 tmp = 0x0;
22480 tmp |= fieldFromInstruction(insn, 12, 1) << 0;
22481 tmp |= fieldFromInstruction(insn, 30, 1) << 1;
22482 MI.addOperand(MCOperand::createImm(tmp));
22483 tmp = fieldFromInstruction(insn, 5, 5);
22484 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22487 tmp = fieldFromInstruction(insn, 0, 5);
22488 if (!Check(S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22489 tmp = fieldFromInstruction(insn, 30, 1);
22490 MI.addOperand(MCOperand::createImm(tmp));
22491 tmp = fieldFromInstruction(insn, 5, 5);
22492 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22495 tmp = fieldFromInstruction(insn, 0, 5);
22496 if (!Check(S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22497 tmp = 0x0;
22498 tmp |= fieldFromInstruction(insn, 12, 1) << 0;
22499 tmp |= fieldFromInstruction(insn, 30, 1) << 1;
22500 MI.addOperand(MCOperand::createImm(tmp));
22501 tmp = fieldFromInstruction(insn, 5, 5);
22502 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22505 tmp = fieldFromInstruction(insn, 0, 5);
22506 if (!Check(S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22507 tmp = fieldFromInstruction(insn, 30, 1);
22508 MI.addOperand(MCOperand::createImm(tmp));
22509 tmp = fieldFromInstruction(insn, 5, 5);
22510 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22513 tmp = fieldFromInstruction(insn, 0, 5);
22514 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22515 tmp = fieldFromInstruction(insn, 0, 5);
22516 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22517 tmp = 0x0;
22518 tmp |= fieldFromInstruction(insn, 10, 3) << 0;
22519 tmp |= fieldFromInstruction(insn, 30, 1) << 3;
22520 MI.addOperand(MCOperand::createImm(tmp));
22521 tmp = fieldFromInstruction(insn, 5, 5);
22522 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22525 tmp = fieldFromInstruction(insn, 0, 5);
22526 if (!Check(S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22527 tmp = fieldFromInstruction(insn, 0, 5);
22528 if (!Check(S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22529 tmp = 0x0;
22530 tmp |= fieldFromInstruction(insn, 10, 3) << 0;
22531 tmp |= fieldFromInstruction(insn, 30, 1) << 3;
22532 MI.addOperand(MCOperand::createImm(tmp));
22533 tmp = fieldFromInstruction(insn, 5, 5);
22534 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22537 tmp = fieldFromInstruction(insn, 0, 5);
22538 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22539 tmp = fieldFromInstruction(insn, 0, 5);
22540 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22541 tmp = 0x0;
22542 tmp |= fieldFromInstruction(insn, 11, 2) << 0;
22543 tmp |= fieldFromInstruction(insn, 30, 1) << 2;
22544 MI.addOperand(MCOperand::createImm(tmp));
22545 tmp = fieldFromInstruction(insn, 5, 5);
22546 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22549 tmp = fieldFromInstruction(insn, 0, 5);
22550 if (!Check(S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22551 tmp = fieldFromInstruction(insn, 0, 5);
22552 if (!Check(S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22553 tmp = 0x0;
22554 tmp |= fieldFromInstruction(insn, 11, 2) << 0;
22555 tmp |= fieldFromInstruction(insn, 30, 1) << 2;
22556 MI.addOperand(MCOperand::createImm(tmp));
22557 tmp = fieldFromInstruction(insn, 5, 5);
22558 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22561 tmp = fieldFromInstruction(insn, 0, 5);
22562 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22563 tmp = fieldFromInstruction(insn, 0, 5);
22564 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22565 tmp = 0x0;
22566 tmp |= fieldFromInstruction(insn, 12, 1) << 0;
22567 tmp |= fieldFromInstruction(insn, 30, 1) << 1;
22568 MI.addOperand(MCOperand::createImm(tmp));
22569 tmp = fieldFromInstruction(insn, 5, 5);
22570 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22573 tmp = fieldFromInstruction(insn, 0, 5);
22574 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22575 tmp = fieldFromInstruction(insn, 0, 5);
22576 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22577 tmp = fieldFromInstruction(insn, 30, 1);
22578 MI.addOperand(MCOperand::createImm(tmp));
22579 tmp = fieldFromInstruction(insn, 5, 5);
22580 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22583 tmp = fieldFromInstruction(insn, 0, 5);
22584 if (!Check(S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22585 tmp = fieldFromInstruction(insn, 0, 5);
22586 if (!Check(S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22587 tmp = 0x0;
22588 tmp |= fieldFromInstruction(insn, 12, 1) << 0;
22589 tmp |= fieldFromInstruction(insn, 30, 1) << 1;
22590 MI.addOperand(MCOperand::createImm(tmp));
22591 tmp = fieldFromInstruction(insn, 5, 5);
22592 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22595 tmp = fieldFromInstruction(insn, 0, 5);
22596 if (!Check(S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22597 tmp = fieldFromInstruction(insn, 0, 5);
22598 if (!Check(S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22599 tmp = fieldFromInstruction(insn, 30, 1);
22600 MI.addOperand(MCOperand::createImm(tmp));
22601 tmp = fieldFromInstruction(insn, 5, 5);
22602 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22605 tmp = fieldFromInstruction(insn, 0, 5);
22606 if (!Check(S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22607 tmp = fieldFromInstruction(insn, 0, 5);
22608 if (!Check(S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22609 tmp = 0x0;
22610 tmp |= fieldFromInstruction(insn, 10, 3) << 0;
22611 tmp |= fieldFromInstruction(insn, 30, 1) << 3;
22612 MI.addOperand(MCOperand::createImm(tmp));
22613 tmp = fieldFromInstruction(insn, 5, 5);
22614 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22617 tmp = fieldFromInstruction(insn, 0, 5);
22618 if (!Check(S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22619 tmp = fieldFromInstruction(insn, 0, 5);
22620 if (!Check(S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22621 tmp = 0x0;
22622 tmp |= fieldFromInstruction(insn, 10, 3) << 0;
22623 tmp |= fieldFromInstruction(insn, 30, 1) << 3;
22624 MI.addOperand(MCOperand::createImm(tmp));
22625 tmp = fieldFromInstruction(insn, 5, 5);
22626 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22629 tmp = fieldFromInstruction(insn, 0, 5);
22630 if (!Check(S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22631 tmp = fieldFromInstruction(insn, 0, 5);
22632 if (!Check(S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22633 tmp = 0x0;
22634 tmp |= fieldFromInstruction(insn, 11, 2) << 0;
22635 tmp |= fieldFromInstruction(insn, 30, 1) << 2;
22636 MI.addOperand(MCOperand::createImm(tmp));
22637 tmp = fieldFromInstruction(insn, 5, 5);
22638 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22641 tmp = fieldFromInstruction(insn, 0, 5);
22642 if (!Check(S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22643 tmp = fieldFromInstruction(insn, 0, 5);
22644 if (!Check(S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22645 tmp = 0x0;
22646 tmp |= fieldFromInstruction(insn, 11, 2) << 0;
22647 tmp |= fieldFromInstruction(insn, 30, 1) << 2;
22648 MI.addOperand(MCOperand::createImm(tmp));
22649 tmp = fieldFromInstruction(insn, 5, 5);
22650 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22653 tmp = fieldFromInstruction(insn, 0, 5);
22654 if (!Check(S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22655 tmp = fieldFromInstruction(insn, 0, 5);
22656 if (!Check(S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22657 tmp = 0x0;
22658 tmp |= fieldFromInstruction(insn, 12, 1) << 0;
22659 tmp |= fieldFromInstruction(insn, 30, 1) << 1;
22660 MI.addOperand(MCOperand::createImm(tmp));
22661 tmp = fieldFromInstruction(insn, 5, 5);
22662 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22665 tmp = fieldFromInstruction(insn, 0, 5);
22666 if (!Check(S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22667 tmp = fieldFromInstruction(insn, 0, 5);
22668 if (!Check(S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22669 tmp = fieldFromInstruction(insn, 30, 1);
22670 MI.addOperand(MCOperand::createImm(tmp));
22671 tmp = fieldFromInstruction(insn, 5, 5);
22672 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22675 tmp = fieldFromInstruction(insn, 0, 5);
22676 if (!Check(S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22677 tmp = fieldFromInstruction(insn, 0, 5);
22678 if (!Check(S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22679 tmp = 0x0;
22680 tmp |= fieldFromInstruction(insn, 12, 1) << 0;
22681 tmp |= fieldFromInstruction(insn, 30, 1) << 1;
22682 MI.addOperand(MCOperand::createImm(tmp));
22683 tmp = fieldFromInstruction(insn, 5, 5);
22684 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22687 tmp = fieldFromInstruction(insn, 0, 5);
22688 if (!Check(S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22689 tmp = fieldFromInstruction(insn, 0, 5);
22690 if (!Check(S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22691 tmp = fieldFromInstruction(insn, 30, 1);
22692 MI.addOperand(MCOperand::createImm(tmp));
22693 tmp = fieldFromInstruction(insn, 5, 5);
22694 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22697 tmp = fieldFromInstruction(insn, 5, 5);
22698 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22699 tmp = fieldFromInstruction(insn, 0, 5);
22700 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22701 tmp = 0x0;
22702 tmp |= fieldFromInstruction(insn, 10, 3) << 0;
22703 tmp |= fieldFromInstruction(insn, 30, 1) << 3;
22704 MI.addOperand(MCOperand::createImm(tmp));
22705 tmp = fieldFromInstruction(insn, 5, 5);
22706 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22707 tmp = fieldFromInstruction(insn, 16, 5);
22708 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22711 tmp = fieldFromInstruction(insn, 5, 5);
22712 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22713 tmp = fieldFromInstruction(insn, 0, 5);
22714 if (!Check(S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22715 tmp = 0x0;
22716 tmp |= fieldFromInstruction(insn, 10, 3) << 0;
22717 tmp |= fieldFromInstruction(insn, 30, 1) << 3;
22718 MI.addOperand(MCOperand::createImm(tmp));
22719 tmp = fieldFromInstruction(insn, 5, 5);
22720 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22721 tmp = fieldFromInstruction(insn, 16, 5);
22722 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22725 tmp = fieldFromInstruction(insn, 5, 5);
22726 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22727 tmp = fieldFromInstruction(insn, 0, 5);
22728 if (!Check(S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22729 tmp = 0x0;
22730 tmp |= fieldFromInstruction(insn, 10, 3) << 0;
22731 tmp |= fieldFromInstruction(insn, 30, 1) << 3;
22732 MI.addOperand(MCOperand::createImm(tmp));
22733 tmp = fieldFromInstruction(insn, 5, 5);
22734 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22735 tmp = fieldFromInstruction(insn, 16, 5);
22736 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22739 tmp = fieldFromInstruction(insn, 5, 5);
22740 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22741 tmp = fieldFromInstruction(insn, 0, 5);
22742 if (!Check(S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22743 tmp = 0x0;
22744 tmp |= fieldFromInstruction(insn, 10, 3) << 0;
22745 tmp |= fieldFromInstruction(insn, 30, 1) << 3;
22746 MI.addOperand(MCOperand::createImm(tmp));
22747 tmp = fieldFromInstruction(insn, 5, 5);
22748 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22749 tmp = fieldFromInstruction(insn, 16, 5);
22750 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22753 tmp = fieldFromInstruction(insn, 5, 5);
22754 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22755 tmp = fieldFromInstruction(insn, 0, 5);
22756 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22757 tmp = 0x0;
22758 tmp |= fieldFromInstruction(insn, 11, 2) << 0;
22759 tmp |= fieldFromInstruction(insn, 30, 1) << 2;
22760 MI.addOperand(MCOperand::createImm(tmp));
22761 tmp = fieldFromInstruction(insn, 5, 5);
22762 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22763 tmp = fieldFromInstruction(insn, 16, 5);
22764 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22767 tmp = fieldFromInstruction(insn, 5, 5);
22768 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22769 tmp = fieldFromInstruction(insn, 0, 5);
22770 if (!Check(S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22771 tmp = 0x0;
22772 tmp |= fieldFromInstruction(insn, 11, 2) << 0;
22773 tmp |= fieldFromInstruction(insn, 30, 1) << 2;
22774 MI.addOperand(MCOperand::createImm(tmp));
22775 tmp = fieldFromInstruction(insn, 5, 5);
22776 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22777 tmp = fieldFromInstruction(insn, 16, 5);
22778 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22781 tmp = fieldFromInstruction(insn, 5, 5);
22782 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22783 tmp = fieldFromInstruction(insn, 0, 5);
22784 if (!Check(S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22785 tmp = 0x0;
22786 tmp |= fieldFromInstruction(insn, 11, 2) << 0;
22787 tmp |= fieldFromInstruction(insn, 30, 1) << 2;
22788 MI.addOperand(MCOperand::createImm(tmp));
22789 tmp = fieldFromInstruction(insn, 5, 5);
22790 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22791 tmp = fieldFromInstruction(insn, 16, 5);
22792 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22795 tmp = fieldFromInstruction(insn, 5, 5);
22796 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22797 tmp = fieldFromInstruction(insn, 0, 5);
22798 if (!Check(S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22799 tmp = 0x0;
22800 tmp |= fieldFromInstruction(insn, 11, 2) << 0;
22801 tmp |= fieldFromInstruction(insn, 30, 1) << 2;
22802 MI.addOperand(MCOperand::createImm(tmp));
22803 tmp = fieldFromInstruction(insn, 5, 5);
22804 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22805 tmp = fieldFromInstruction(insn, 16, 5);
22806 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22809 tmp = fieldFromInstruction(insn, 5, 5);
22810 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22811 tmp = fieldFromInstruction(insn, 0, 5);
22812 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22813 tmp = 0x0;
22814 tmp |= fieldFromInstruction(insn, 12, 1) << 0;
22815 tmp |= fieldFromInstruction(insn, 30, 1) << 1;
22816 MI.addOperand(MCOperand::createImm(tmp));
22817 tmp = fieldFromInstruction(insn, 5, 5);
22818 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22819 tmp = fieldFromInstruction(insn, 16, 5);
22820 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22823 tmp = fieldFromInstruction(insn, 5, 5);
22824 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22825 tmp = fieldFromInstruction(insn, 0, 5);
22826 if (!Check(S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22827 tmp = 0x0;
22828 tmp |= fieldFromInstruction(insn, 12, 1) << 0;
22829 tmp |= fieldFromInstruction(insn, 30, 1) << 1;
22830 MI.addOperand(MCOperand::createImm(tmp));
22831 tmp = fieldFromInstruction(insn, 5, 5);
22832 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22833 tmp = fieldFromInstruction(insn, 16, 5);
22834 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22837 tmp = fieldFromInstruction(insn, 5, 5);
22838 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22839 tmp = fieldFromInstruction(insn, 0, 5);
22840 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22841 tmp = fieldFromInstruction(insn, 30, 1);
22842 MI.addOperand(MCOperand::createImm(tmp));
22843 tmp = fieldFromInstruction(insn, 5, 5);
22844 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22845 tmp = fieldFromInstruction(insn, 16, 5);
22846 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22849 tmp = fieldFromInstruction(insn, 5, 5);
22850 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22851 tmp = fieldFromInstruction(insn, 0, 5);
22852 if (!Check(S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22853 tmp = fieldFromInstruction(insn, 30, 1);
22854 MI.addOperand(MCOperand::createImm(tmp));
22855 tmp = fieldFromInstruction(insn, 5, 5);
22856 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22857 tmp = fieldFromInstruction(insn, 16, 5);
22858 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22861 tmp = fieldFromInstruction(insn, 5, 5);
22862 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22863 tmp = fieldFromInstruction(insn, 0, 5);
22864 if (!Check(S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22865 tmp = 0x0;
22866 tmp |= fieldFromInstruction(insn, 12, 1) << 0;
22867 tmp |= fieldFromInstruction(insn, 30, 1) << 1;
22868 MI.addOperand(MCOperand::createImm(tmp));
22869 tmp = fieldFromInstruction(insn, 5, 5);
22870 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22871 tmp = fieldFromInstruction(insn, 16, 5);
22872 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22875 tmp = fieldFromInstruction(insn, 5, 5);
22876 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22877 tmp = fieldFromInstruction(insn, 0, 5);
22878 if (!Check(S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22879 tmp = 0x0;
22880 tmp |= fieldFromInstruction(insn, 12, 1) << 0;
22881 tmp |= fieldFromInstruction(insn, 30, 1) << 1;
22882 MI.addOperand(MCOperand::createImm(tmp));
22883 tmp = fieldFromInstruction(insn, 5, 5);
22884 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22885 tmp = fieldFromInstruction(insn, 16, 5);
22886 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22889 tmp = fieldFromInstruction(insn, 5, 5);
22890 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22891 tmp = fieldFromInstruction(insn, 0, 5);
22892 if (!Check(S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22893 tmp = fieldFromInstruction(insn, 30, 1);
22894 MI.addOperand(MCOperand::createImm(tmp));
22895 tmp = fieldFromInstruction(insn, 5, 5);
22896 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22897 tmp = fieldFromInstruction(insn, 16, 5);
22898 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22901 tmp = fieldFromInstruction(insn, 5, 5);
22902 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22903 tmp = fieldFromInstruction(insn, 0, 5);
22904 if (!Check(S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22905 tmp = fieldFromInstruction(insn, 30, 1);
22906 MI.addOperand(MCOperand::createImm(tmp));
22907 tmp = fieldFromInstruction(insn, 5, 5);
22908 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22909 tmp = fieldFromInstruction(insn, 16, 5);
22910 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22913 tmp = fieldFromInstruction(insn, 5, 5);
22914 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22915 tmp = fieldFromInstruction(insn, 0, 5);
22916 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22917 tmp = fieldFromInstruction(insn, 0, 5);
22918 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22919 tmp = 0x0;
22920 tmp |= fieldFromInstruction(insn, 10, 3) << 0;
22921 tmp |= fieldFromInstruction(insn, 30, 1) << 3;
22922 MI.addOperand(MCOperand::createImm(tmp));
22923 tmp = fieldFromInstruction(insn, 5, 5);
22924 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22925 tmp = fieldFromInstruction(insn, 16, 5);
22926 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22929 tmp = fieldFromInstruction(insn, 5, 5);
22930 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22931 tmp = fieldFromInstruction(insn, 0, 5);
22932 if (!Check(S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22933 tmp = fieldFromInstruction(insn, 0, 5);
22934 if (!Check(S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22935 tmp = 0x0;
22936 tmp |= fieldFromInstruction(insn, 10, 3) << 0;
22937 tmp |= fieldFromInstruction(insn, 30, 1) << 3;
22938 MI.addOperand(MCOperand::createImm(tmp));
22939 tmp = fieldFromInstruction(insn, 5, 5);
22940 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22941 tmp = fieldFromInstruction(insn, 16, 5);
22942 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22945 tmp = fieldFromInstruction(insn, 5, 5);
22946 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22947 tmp = fieldFromInstruction(insn, 0, 5);
22948 if (!Check(S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22949 tmp = fieldFromInstruction(insn, 0, 5);
22950 if (!Check(S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22951 tmp = 0x0;
22952 tmp |= fieldFromInstruction(insn, 10, 3) << 0;
22953 tmp |= fieldFromInstruction(insn, 30, 1) << 3;
22954 MI.addOperand(MCOperand::createImm(tmp));
22955 tmp = fieldFromInstruction(insn, 5, 5);
22956 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22957 tmp = fieldFromInstruction(insn, 16, 5);
22958 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22961 tmp = fieldFromInstruction(insn, 5, 5);
22962 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22963 tmp = fieldFromInstruction(insn, 0, 5);
22964 if (!Check(S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22965 tmp = fieldFromInstruction(insn, 0, 5);
22966 if (!Check(S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22967 tmp = 0x0;
22968 tmp |= fieldFromInstruction(insn, 10, 3) << 0;
22969 tmp |= fieldFromInstruction(insn, 30, 1) << 3;
22970 MI.addOperand(MCOperand::createImm(tmp));
22971 tmp = fieldFromInstruction(insn, 5, 5);
22972 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22973 tmp = fieldFromInstruction(insn, 16, 5);
22974 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22977 tmp = fieldFromInstruction(insn, 5, 5);
22978 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22979 tmp = fieldFromInstruction(insn, 0, 5);
22980 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22981 tmp = fieldFromInstruction(insn, 0, 5);
22982 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22983 tmp = 0x0;
22984 tmp |= fieldFromInstruction(insn, 11, 2) << 0;
22985 tmp |= fieldFromInstruction(insn, 30, 1) << 2;
22986 MI.addOperand(MCOperand::createImm(tmp));
22987 tmp = fieldFromInstruction(insn, 5, 5);
22988 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22989 tmp = fieldFromInstruction(insn, 16, 5);
22990 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22993 tmp = fieldFromInstruction(insn, 5, 5);
22994 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22995 tmp = fieldFromInstruction(insn, 0, 5);
22996 if (!Check(S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22997 tmp = fieldFromInstruction(insn, 0, 5);
22998 if (!Check(S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
22999 tmp = 0x0;
23000 tmp |= fieldFromInstruction(insn, 11, 2) << 0;
23001 tmp |= fieldFromInstruction(insn, 30, 1) << 2;
23002 MI.addOperand(MCOperand::createImm(tmp));
23003 tmp = fieldFromInstruction(insn, 5, 5);
23004 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23005 tmp = fieldFromInstruction(insn, 16, 5);
23006 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23009 tmp = fieldFromInstruction(insn, 5, 5);
23010 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23011 tmp = fieldFromInstruction(insn, 0, 5);
23012 if (!Check(S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23013 tmp = fieldFromInstruction(insn, 0, 5);
23014 if (!Check(S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23015 tmp = 0x0;
23016 tmp |= fieldFromInstruction(insn, 11, 2) << 0;
23017 tmp |= fieldFromInstruction(insn, 30, 1) << 2;
23018 MI.addOperand(MCOperand::createImm(tmp));
23019 tmp = fieldFromInstruction(insn, 5, 5);
23020 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23021 tmp = fieldFromInstruction(insn, 16, 5);
23022 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23025 tmp = fieldFromInstruction(insn, 5, 5);
23026 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23027 tmp = fieldFromInstruction(insn, 0, 5);
23028 if (!Check(S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23029 tmp = fieldFromInstruction(insn, 0, 5);
23030 if (!Check(S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23031 tmp = 0x0;
23032 tmp |= fieldFromInstruction(insn, 11, 2) << 0;
23033 tmp |= fieldFromInstruction(insn, 30, 1) << 2;
23034 MI.addOperand(MCOperand::createImm(tmp));
23035 tmp = fieldFromInstruction(insn, 5, 5);
23036 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23037 tmp = fieldFromInstruction(insn, 16, 5);
23038 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23041 tmp = fieldFromInstruction(insn, 5, 5);
23042 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23043 tmp = fieldFromInstruction(insn, 0, 5);
23044 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23045 tmp = fieldFromInstruction(insn, 0, 5);
23046 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23047 tmp = 0x0;
23048 tmp |= fieldFromInstruction(insn, 12, 1) << 0;
23049 tmp |= fieldFromInstruction(insn, 30, 1) << 1;
23050 MI.addOperand(MCOperand::createImm(tmp));
23051 tmp = fieldFromInstruction(insn, 5, 5);
23052 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23053 tmp = fieldFromInstruction(insn, 16, 5);
23054 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23057 tmp = fieldFromInstruction(insn, 5, 5);
23058 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23059 tmp = fieldFromInstruction(insn, 0, 5);
23060 if (!Check(S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23061 tmp = fieldFromInstruction(insn, 0, 5);
23062 if (!Check(S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23063 tmp = 0x0;
23064 tmp |= fieldFromInstruction(insn, 12, 1) << 0;
23065 tmp |= fieldFromInstruction(insn, 30, 1) << 1;
23066 MI.addOperand(MCOperand::createImm(tmp));
23067 tmp = fieldFromInstruction(insn, 5, 5);
23068 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23069 tmp = fieldFromInstruction(insn, 16, 5);
23070 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23073 tmp = fieldFromInstruction(insn, 5, 5);
23074 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23075 tmp = fieldFromInstruction(insn, 0, 5);
23076 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23077 tmp = fieldFromInstruction(insn, 0, 5);
23078 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23079 tmp = fieldFromInstruction(insn, 30, 1);
23080 MI.addOperand(MCOperand::createImm(tmp));
23081 tmp = fieldFromInstruction(insn, 5, 5);
23082 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23083 tmp = fieldFromInstruction(insn, 16, 5);
23084 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23087 tmp = fieldFromInstruction(insn, 5, 5);
23088 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23089 tmp = fieldFromInstruction(insn, 0, 5);
23090 if (!Check(S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23091 tmp = fieldFromInstruction(insn, 0, 5);
23092 if (!Check(S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23093 tmp = fieldFromInstruction(insn, 30, 1);
23094 MI.addOperand(MCOperand::createImm(tmp));
23095 tmp = fieldFromInstruction(insn, 5, 5);
23096 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23097 tmp = fieldFromInstruction(insn, 16, 5);
23098 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23101 tmp = fieldFromInstruction(insn, 5, 5);
23102 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23103 tmp = fieldFromInstruction(insn, 0, 5);
23104 if (!Check(S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23105 tmp = fieldFromInstruction(insn, 0, 5);
23106 if (!Check(S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23107 tmp = 0x0;
23108 tmp |= fieldFromInstruction(insn, 12, 1) << 0;
23109 tmp |= fieldFromInstruction(insn, 30, 1) << 1;
23110 MI.addOperand(MCOperand::createImm(tmp));
23111 tmp = fieldFromInstruction(insn, 5, 5);
23112 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23113 tmp = fieldFromInstruction(insn, 16, 5);
23114 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23117 tmp = fieldFromInstruction(insn, 5, 5);
23118 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23119 tmp = fieldFromInstruction(insn, 0, 5);
23120 if (!Check(S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23121 tmp = fieldFromInstruction(insn, 0, 5);
23122 if (!Check(S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23123 tmp = 0x0;
23124 tmp |= fieldFromInstruction(insn, 12, 1) << 0;
23125 tmp |= fieldFromInstruction(insn, 30, 1) << 1;
23126 MI.addOperand(MCOperand::createImm(tmp));
23127 tmp = fieldFromInstruction(insn, 5, 5);
23128 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23129 tmp = fieldFromInstruction(insn, 16, 5);
23130 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23133 tmp = fieldFromInstruction(insn, 5, 5);
23134 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23135 tmp = fieldFromInstruction(insn, 0, 5);
23136 if (!Check(S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23137 tmp = fieldFromInstruction(insn, 0, 5);
23138 if (!Check(S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23139 tmp = fieldFromInstruction(insn, 30, 1);
23140 MI.addOperand(MCOperand::createImm(tmp));
23141 tmp = fieldFromInstruction(insn, 5, 5);
23142 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23143 tmp = fieldFromInstruction(insn, 16, 5);
23144 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23147 tmp = fieldFromInstruction(insn, 5, 5);
23148 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23149 tmp = fieldFromInstruction(insn, 0, 5);
23150 if (!Check(S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23151 tmp = fieldFromInstruction(insn, 0, 5);
23152 if (!Check(S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23153 tmp = fieldFromInstruction(insn, 30, 1);
23154 MI.addOperand(MCOperand::createImm(tmp));
23155 tmp = fieldFromInstruction(insn, 5, 5);
23156 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23157 tmp = fieldFromInstruction(insn, 16, 5);
23158 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23161 tmp = fieldFromInstruction(insn, 0, 5);
23162 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23163 tmp = fieldFromInstruction(insn, 5, 5);
23164 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23165 tmp = fieldFromInstruction(insn, 16, 5);
23166 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23169 tmp = fieldFromInstruction(insn, 0, 5);
23170 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23171 tmp = fieldFromInstruction(insn, 5, 5);
23172 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23173 tmp = fieldFromInstruction(insn, 16, 5);
23174 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23177 tmp = fieldFromInstruction(insn, 0, 5);
23178 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23179 tmp = fieldFromInstruction(insn, 5, 5);
23180 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23181 tmp = fieldFromInstruction(insn, 19, 2);
23182 MI.addOperand(MCOperand::createImm(tmp));
23185 tmp = fieldFromInstruction(insn, 0, 5);
23186 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23187 tmp = fieldFromInstruction(insn, 5, 5);
23188 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23189 tmp = fieldFromInstruction(insn, 18, 3);
23190 MI.addOperand(MCOperand::createImm(tmp));
23193 tmp = fieldFromInstruction(insn, 0, 5);
23194 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23195 tmp = fieldFromInstruction(insn, 5, 5);
23196 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23197 tmp = fieldFromInstruction(insn, 17, 4);
23198 MI.addOperand(MCOperand::createImm(tmp));
23201 tmp = fieldFromInstruction(insn, 0, 5);
23202 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23203 tmp = fieldFromInstruction(insn, 5, 5);
23204 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23205 tmp = fieldFromInstruction(insn, 16, 5);
23206 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23209 tmp = fieldFromInstruction(insn, 0, 5);
23210 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23211 tmp = fieldFromInstruction(insn, 5, 5);
23212 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23215 tmp = fieldFromInstruction(insn, 0, 5);
23216 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23217 tmp = fieldFromInstruction(insn, 5, 5);
23218 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23221 tmp = fieldFromInstruction(insn, 0, 5);
23222 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23223 tmp = fieldFromInstruction(insn, 0, 5);
23224 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23225 tmp = fieldFromInstruction(insn, 5, 5);
23226 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23227 tmp = fieldFromInstruction(insn, 16, 5);
23228 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23231 tmp = fieldFromInstruction(insn, 0, 5);
23232 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23233 tmp = fieldFromInstruction(insn, 5, 5);
23234 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23235 tmp = fieldFromInstruction(insn, 16, 5);
23236 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23239 tmp = fieldFromInstruction(insn, 0, 5);
23240 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23241 tmp = fieldFromInstruction(insn, 5, 5);
23242 if (!Check(S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23243 tmp = fieldFromInstruction(insn, 16, 5);
23244 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23247 tmp = fieldFromInstruction(insn, 0, 5);
23248 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23249 tmp = fieldFromInstruction(insn, 5, 5);
23250 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23253 tmp = fieldFromInstruction(insn, 0, 5);
23254 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23255 tmp = fieldFromInstruction(insn, 5, 5);
23256 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23257 tmp = fieldFromInstruction(insn, 18, 3);
23258 MI.addOperand(MCOperand::createImm(tmp));
23261 tmp = fieldFromInstruction(insn, 0, 5);
23262 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23263 tmp = fieldFromInstruction(insn, 5, 5);
23264 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23265 tmp = fieldFromInstruction(insn, 17, 4);
23266 MI.addOperand(MCOperand::createImm(tmp));
23269 tmp = fieldFromInstruction(insn, 0, 5);
23270 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23271 tmp = fieldFromInstruction(insn, 0, 5);
23272 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23273 tmp = fieldFromInstruction(insn, 5, 5);
23274 if (!Check(S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23275 tmp = fieldFromInstruction(insn, 16, 5);
23276 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23279 tmp = fieldFromInstruction(insn, 0, 5);
23280 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23281 tmp = fieldFromInstruction(insn, 0, 5);
23282 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23283 tmp = fieldFromInstruction(insn, 5, 5);
23284 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23287 tmp = fieldFromInstruction(insn, 0, 5);
23288 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23289 tmp = fieldFromInstruction(insn, 5, 5);
23290 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23293 tmp = fieldFromInstruction(insn, 0, 5);
23294 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23295 tmp = fieldFromInstruction(insn, 5, 5);
23296 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23297 tmp = fieldFromInstruction(insn, 19, 2);
23298 MI.addOperand(MCOperand::createImm(tmp));
23301 tmp = fieldFromInstruction(insn, 0, 5);
23302 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23303 tmp = fieldFromInstruction(insn, 5, 5);
23304 if (!Check(S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23305 tmp = fieldFromInstruction(insn, 16, 5);
23306 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23309 tmp = fieldFromInstruction(insn, 0, 5);
23310 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23311 tmp = fieldFromInstruction(insn, 5, 5);
23312 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23313 tmp = fieldFromInstruction(insn, 16, 5);
23314 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23317 tmp = fieldFromInstruction(insn, 0, 5);
23318 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23319 tmp = fieldFromInstruction(insn, 0, 5);
23320 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23321 tmp = fieldFromInstruction(insn, 5, 5);
23322 if (!Check(S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23323 tmp = fieldFromInstruction(insn, 16, 5);
23324 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23327 tmp = fieldFromInstruction(insn, 0, 5);
23328 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23329 tmp = fieldFromInstruction(insn, 0, 5);
23330 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23331 tmp = fieldFromInstruction(insn, 5, 5);
23332 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23333 tmp = fieldFromInstruction(insn, 16, 5);
23334 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23337 tmp = fieldFromInstruction(insn, 0, 5);
23338 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23339 tmp = fieldFromInstruction(insn, 5, 5);
23340 if (!Check(S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23341 tmp = fieldFromInstruction(insn, 16, 5);
23342 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23345 tmp = fieldFromInstruction(insn, 0, 5);
23346 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23347 tmp = fieldFromInstruction(insn, 0, 5);
23348 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23349 tmp = fieldFromInstruction(insn, 5, 5);
23350 if (!Check(S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23351 tmp = fieldFromInstruction(insn, 16, 5);
23352 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23355 tmp = fieldFromInstruction(insn, 0, 5);
23356 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23357 tmp = fieldFromInstruction(insn, 5, 5);
23358 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23361 tmp = fieldFromInstruction(insn, 0, 5);
23362 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23363 tmp = fieldFromInstruction(insn, 0, 5);
23364 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23365 tmp = fieldFromInstruction(insn, 5, 5);
23366 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23367 tmp = fieldFromInstruction(insn, 16, 5);
23368 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23371 tmp = fieldFromInstruction(insn, 0, 5);
23372 if (!Check(S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23373 tmp = fieldFromInstruction(insn, 5, 5);
23374 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23377 tmp = fieldFromInstruction(insn, 0, 5);
23378 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23379 tmp = fieldFromInstruction(insn, 5, 5);
23380 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23381 tmp = fieldFromInstruction(insn, 16, 5);
23382 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23383 tmp = fieldFromInstruction(insn, 11, 3);
23384 MI.addOperand(MCOperand::createImm(tmp));
23387 tmp = fieldFromInstruction(insn, 0, 5);
23388 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23389 tmp = fieldFromInstruction(insn, 5, 5);
23390 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23391 tmp = fieldFromInstruction(insn, 16, 5);
23392 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23395 tmp = fieldFromInstruction(insn, 0, 5);
23396 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23397 tmp = fieldFromInstruction(insn, 5, 5);
23398 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23399 tmp = fieldFromInstruction(insn, 20, 1);
23400 MI.addOperand(MCOperand::createImm(tmp));
23403 tmp = fieldFromInstruction(insn, 0, 5);
23404 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23405 tmp = fieldFromInstruction(insn, 5, 5);
23406 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23407 tmp = fieldFromInstruction(insn, 19, 2);
23408 MI.addOperand(MCOperand::createImm(tmp));
23411 tmp = fieldFromInstruction(insn, 0, 5);
23412 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23413 tmp = fieldFromInstruction(insn, 5, 5);
23414 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23415 tmp = fieldFromInstruction(insn, 18, 3);
23416 MI.addOperand(MCOperand::createImm(tmp));
23419 tmp = fieldFromInstruction(insn, 0, 5);
23420 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23421 tmp = fieldFromInstruction(insn, 5, 5);
23422 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23423 tmp = fieldFromInstruction(insn, 17, 4);
23424 MI.addOperand(MCOperand::createImm(tmp));
23427 tmp = fieldFromInstruction(insn, 0, 5);
23428 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23429 tmp = fieldFromInstruction(insn, 5, 5);
23430 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23433 tmp = fieldFromInstruction(insn, 0, 5);
23434 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23435 tmp = fieldFromInstruction(insn, 5, 5);
23436 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23439 tmp = fieldFromInstruction(insn, 0, 5);
23440 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23441 tmp = fieldFromInstruction(insn, 5, 5);
23442 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23445 tmp = fieldFromInstruction(insn, 0, 5);
23446 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23447 tmp = fieldFromInstruction(insn, 0, 5);
23448 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23449 tmp = fieldFromInstruction(insn, 5, 5);
23450 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23451 tmp = fieldFromInstruction(insn, 16, 5);
23452 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23455 tmp = fieldFromInstruction(insn, 0, 5);
23456 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23457 tmp = fieldFromInstruction(insn, 0, 5);
23458 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23459 tmp = fieldFromInstruction(insn, 20, 1);
23460 MI.addOperand(MCOperand::createImm(tmp));
23461 tmp = fieldFromInstruction(insn, 5, 5);
23462 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23465 tmp = fieldFromInstruction(insn, 0, 5);
23466 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23467 tmp = fieldFromInstruction(insn, 0, 5);
23468 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23469 tmp = fieldFromInstruction(insn, 19, 2);
23470 MI.addOperand(MCOperand::createImm(tmp));
23471 tmp = fieldFromInstruction(insn, 5, 5);
23472 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23475 tmp = fieldFromInstruction(insn, 0, 5);
23476 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23477 tmp = fieldFromInstruction(insn, 0, 5);
23478 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23479 tmp = fieldFromInstruction(insn, 18, 3);
23480 MI.addOperand(MCOperand::createImm(tmp));
23481 tmp = fieldFromInstruction(insn, 5, 5);
23482 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23485 tmp = fieldFromInstruction(insn, 0, 5);
23486 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23487 tmp = fieldFromInstruction(insn, 0, 5);
23488 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23489 tmp = fieldFromInstruction(insn, 17, 4);
23490 MI.addOperand(MCOperand::createImm(tmp));
23491 tmp = fieldFromInstruction(insn, 5, 5);
23492 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23495 tmp = fieldFromInstruction(insn, 0, 5);
23496 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23497 tmp = fieldFromInstruction(insn, 5, 5);
23498 if (!Check(S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23499 tmp = fieldFromInstruction(insn, 16, 5);
23500 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23503 tmp = fieldFromInstruction(insn, 0, 5);
23504 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23505 tmp = fieldFromInstruction(insn, 0, 5);
23506 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23507 tmp = fieldFromInstruction(insn, 5, 5);
23508 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23511 tmp = fieldFromInstruction(insn, 0, 5);
23512 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23513 tmp = fieldFromInstruction(insn, 5, 5);
23514 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23515 tmp = fieldFromInstruction(insn, 19, 2);
23516 MI.addOperand(MCOperand::createImm(tmp));
23519 tmp = fieldFromInstruction(insn, 0, 5);
23520 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23521 tmp = fieldFromInstruction(insn, 5, 5);
23522 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23523 tmp = fieldFromInstruction(insn, 18, 3);
23524 MI.addOperand(MCOperand::createImm(tmp));
23527 tmp = fieldFromInstruction(insn, 0, 5);
23528 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23529 tmp = fieldFromInstruction(insn, 5, 5);
23530 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23531 tmp = fieldFromInstruction(insn, 17, 4);
23532 MI.addOperand(MCOperand::createImm(tmp));
23535 tmp = fieldFromInstruction(insn, 0, 5);
23536 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23537 tmp = fieldFromInstruction(insn, 0, 5);
23538 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23539 tmp = fieldFromInstruction(insn, 5, 5);
23540 if (!Check(S, DecodeQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23541 tmp = fieldFromInstruction(insn, 16, 5);
23542 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23545 tmp = fieldFromInstruction(insn, 0, 5);
23546 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23547 tmp = fieldFromInstruction(insn, 5, 5);
23548 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23551 tmp = fieldFromInstruction(insn, 0, 5);
23552 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23553 tmp = fieldFromInstruction(insn, 5, 5);
23554 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23555 tmp = fieldFromInstruction(insn, 20, 1);
23556 MI.addOperand(MCOperand::createImm(tmp));
23559 tmp = fieldFromInstruction(insn, 0, 5);
23560 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23561 tmp = fieldFromInstruction(insn, 5, 5);
23562 if (!Check(S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23563 tmp = fieldFromInstruction(insn, 16, 5);
23564 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23567 tmp = fieldFromInstruction(insn, 0, 5);
23568 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23569 tmp = fieldFromInstruction(insn, 0, 5);
23570 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23571 tmp = fieldFromInstruction(insn, 5, 5);
23572 if (!Check(S, DecodeQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23573 tmp = fieldFromInstruction(insn, 16, 5);
23574 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23577 tmp = fieldFromInstruction(insn, 0, 5);
23578 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23579 tmp = fieldFromInstruction(insn, 5, 5);
23580 if (!Check(S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23581 tmp = fieldFromInstruction(insn, 16, 5);
23582 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23585 tmp = fieldFromInstruction(insn, 0, 5);
23586 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23587 tmp = fieldFromInstruction(insn, 0, 5);
23588 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23589 tmp = fieldFromInstruction(insn, 5, 5);
23590 if (!Check(S, DecodeQQQQRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23591 tmp = fieldFromInstruction(insn, 16, 5);
23592 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23595 tmp = fieldFromInstruction(insn, 0, 5);
23596 if (!Check(S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23597 tmp = fieldFromInstruction(insn, 5, 5);
23598 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23601 tmp = fieldFromInstruction(insn, 0, 5);
23602 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23603 tmp = fieldFromInstruction(insn, 5, 5);
23604 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23605 tmp = fieldFromInstruction(insn, 16, 5);
23606 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23607 tmp = fieldFromInstruction(insn, 11, 4);
23608 MI.addOperand(MCOperand::createImm(tmp));
23611 tmp = fieldFromInstruction(insn, 0, 5);
23612 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23613 tmp = fieldFromInstruction(insn, 5, 5);
23614 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23617 tmp = fieldFromInstruction(insn, 0, 5);
23618 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23619 tmp = fieldFromInstruction(insn, 0, 5);
23620 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23621 tmp = fieldFromInstruction(insn, 20, 1);
23622 MI.addOperand(MCOperand::createImm(tmp));
23623 tmp = fieldFromInstruction(insn, 5, 5);
23624 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23625 tmp = fieldFromInstruction(insn, 14, 1);
23626 MI.addOperand(MCOperand::createImm(tmp));
23629 tmp = fieldFromInstruction(insn, 0, 5);
23630 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23631 tmp = fieldFromInstruction(insn, 0, 5);
23632 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23633 tmp = fieldFromInstruction(insn, 19, 2);
23634 MI.addOperand(MCOperand::createImm(tmp));
23635 tmp = fieldFromInstruction(insn, 5, 5);
23636 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23637 tmp = fieldFromInstruction(insn, 13, 2);
23638 MI.addOperand(MCOperand::createImm(tmp));
23641 tmp = fieldFromInstruction(insn, 0, 5);
23642 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23643 tmp = fieldFromInstruction(insn, 0, 5);
23644 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23645 tmp = fieldFromInstruction(insn, 18, 3);
23646 MI.addOperand(MCOperand::createImm(tmp));
23647 tmp = fieldFromInstruction(insn, 5, 5);
23648 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23649 tmp = fieldFromInstruction(insn, 12, 3);
23650 MI.addOperand(MCOperand::createImm(tmp));
23653 tmp = fieldFromInstruction(insn, 0, 5);
23654 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23655 tmp = fieldFromInstruction(insn, 0, 5);
23656 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23657 tmp = fieldFromInstruction(insn, 17, 4);
23658 MI.addOperand(MCOperand::createImm(tmp));
23659 tmp = fieldFromInstruction(insn, 5, 5);
23660 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23661 tmp = fieldFromInstruction(insn, 11, 4);
23662 MI.addOperand(MCOperand::createImm(tmp));
23665 tmp = fieldFromInstruction(insn, 0, 5);
23666 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23667 tmp = fieldFromInstruction(insn, 5, 5);
23668 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23669 tmp = fieldFromInstruction(insn, 16, 5);
23670 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23671 tmp = fieldFromInstruction(insn, 10, 5);
23672 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23675 tmp = fieldFromInstruction(insn, 0, 5);
23676 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23677 tmp = fieldFromInstruction(insn, 5, 5);
23678 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23681 tmp = fieldFromInstruction(insn, 0, 5);
23682 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23683 tmp = fieldFromInstruction(insn, 0, 5);
23684 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23685 tmp = fieldFromInstruction(insn, 5, 5);
23686 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23687 tmp = fieldFromInstruction(insn, 16, 5);
23688 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23689 tmp = fieldFromInstruction(insn, 11, 2);
23690 MI.addOperand(MCOperand::createImm(tmp));
23693 tmp = fieldFromInstruction(insn, 0, 5);
23694 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23695 tmp = fieldFromInstruction(insn, 5, 5);
23696 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23697 tmp = fieldFromInstruction(insn, 16, 5);
23698 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23699 tmp = fieldFromInstruction(insn, 12, 1);
23700 MI.addOperand(MCOperand::createImm(tmp));
23703 tmp = fieldFromInstruction(insn, 0, 5);
23704 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23705 tmp = fieldFromInstruction(insn, 0, 5);
23706 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23707 tmp = fieldFromInstruction(insn, 5, 5);
23708 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23709 tmp = fieldFromInstruction(insn, 16, 5);
23710 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23711 tmp = fieldFromInstruction(insn, 11, 2);
23712 MI.addOperand(MCOperand::createImm(tmp));
23715 tmp = fieldFromInstruction(insn, 0, 5);
23716 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23717 tmp = fieldFromInstruction(insn, 5, 5);
23718 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23719 tmp = fieldFromInstruction(insn, 16, 5);
23720 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23721 tmp = fieldFromInstruction(insn, 12, 1);
23722 MI.addOperand(MCOperand::createImm(tmp));
23725 tmp = fieldFromInstruction(insn, 0, 5);
23726 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23727 tmp = fieldFromInstruction(insn, 0, 5);
23728 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23729 tmp = fieldFromInstruction(insn, 5, 5);
23730 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23731 tmp = fieldFromInstruction(insn, 16, 5);
23732 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23733 tmp = fieldFromInstruction(insn, 12, 2);
23734 MI.addOperand(MCOperand::createImm(tmp));
23737 tmp = fieldFromInstruction(insn, 0, 5);
23738 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23739 tmp = fieldFromInstruction(insn, 5, 5);
23740 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23741 tmp = fieldFromInstruction(insn, 16, 5);
23742 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23743 tmp = fieldFromInstruction(insn, 10, 6);
23744 MI.addOperand(MCOperand::createImm(tmp));
23747 tmp = fieldFromInstruction(insn, 0, 5);
23748 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23749 tmp = fieldFromInstruction(insn, 5, 5);
23750 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23751 tmp = fieldFromInstruction(insn, 0, 5);
23752 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23755 tmp = fieldFromInstruction(insn, 0, 5);
23756 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23757 tmp = fieldFromInstruction(insn, 0, 5);
23758 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23759 tmp = fieldFromInstruction(insn, 5, 5);
23760 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23761 tmp = fieldFromInstruction(insn, 16, 4);
23762 if (!Check(S, DecodeFPR128_loRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23763 tmp = 0x0;
23764 tmp |= fieldFromInstruction(insn, 11, 1) << 2;
23765 tmp |= fieldFromInstruction(insn, 20, 2) << 0;
23766 MI.addOperand(MCOperand::createImm(tmp));
23769 tmp = fieldFromInstruction(insn, 0, 5);
23770 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23771 tmp = fieldFromInstruction(insn, 5, 5);
23772 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23773 tmp = fieldFromInstruction(insn, 16, 4);
23774 if (!Check(S, DecodeFPR128_loRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23775 tmp = 0x0;
23776 tmp |= fieldFromInstruction(insn, 11, 1) << 2;
23777 tmp |= fieldFromInstruction(insn, 20, 2) << 0;
23778 MI.addOperand(MCOperand::createImm(tmp));
23784 tmp = fieldFromInstruction(insn, 0, 5);
23785 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23786 tmp = fieldFromInstruction(insn, 5, 5);
23787 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23788 tmp = fieldFromInstruction(insn, 16, 3);
23789 if (!Check(S, DecodeVecShiftR8Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23792 tmp = fieldFromInstruction(insn, 0, 5);
23793 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23794 tmp = fieldFromInstruction(insn, 5, 5);
23795 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23796 tmp = fieldFromInstruction(insn, 16, 4);
23797 if (!Check(S, DecodeVecShiftR16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23800 tmp = fieldFromInstruction(insn, 0, 5);
23801 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23802 tmp = fieldFromInstruction(insn, 5, 5);
23803 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23804 tmp = fieldFromInstruction(insn, 16, 5);
23805 if (!Check(S, DecodeVecShiftR32Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23811 tmp = fieldFromInstruction(insn, 0, 5);
23812 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23813 tmp = fieldFromInstruction(insn, 0, 5);
23814 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23815 tmp = fieldFromInstruction(insn, 5, 5);
23816 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23817 tmp = fieldFromInstruction(insn, 16, 3);
23818 if (!Check(S, DecodeVecShiftR8Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23821 tmp = fieldFromInstruction(insn, 0, 5);
23822 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23823 tmp = fieldFromInstruction(insn, 5, 5);
23824 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23825 tmp = fieldFromInstruction(insn, 16, 3);
23826 if (!Check(S, DecodeVecShiftL8Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23829 tmp = fieldFromInstruction(insn, 0, 5);
23830 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23831 tmp = fieldFromInstruction(insn, 0, 5);
23832 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23833 tmp = fieldFromInstruction(insn, 5, 5);
23834 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23835 tmp = fieldFromInstruction(insn, 16, 4);
23836 if (!Check(S, DecodeVecShiftR16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23839 tmp = fieldFromInstruction(insn, 0, 5);
23840 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23841 tmp = fieldFromInstruction(insn, 5, 5);
23842 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23843 tmp = fieldFromInstruction(insn, 16, 4);
23844 if (!Check(S, DecodeVecShiftL16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23847 tmp = fieldFromInstruction(insn, 0, 5);
23848 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23849 tmp = fieldFromInstruction(insn, 0, 5);
23850 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23851 tmp = fieldFromInstruction(insn, 5, 5);
23852 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23853 tmp = fieldFromInstruction(insn, 16, 5);
23854 if (!Check(S, DecodeVecShiftR32Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23857 tmp = fieldFromInstruction(insn, 0, 5);
23858 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23859 tmp = fieldFromInstruction(insn, 5, 5);
23860 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23861 tmp = fieldFromInstruction(insn, 16, 5);
23862 if (!Check(S, DecodeVecShiftL32Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23865 tmp = fieldFromInstruction(insn, 0, 5);
23866 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23867 tmp = fieldFromInstruction(insn, 5, 5);
23868 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23869 tmp = fieldFromInstruction(insn, 16, 3);
23870 if (!Check(S, DecodeVecShiftR16ImmNarrow(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23873 tmp = fieldFromInstruction(insn, 0, 5);
23874 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23875 tmp = fieldFromInstruction(insn, 5, 5);
23876 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23877 tmp = fieldFromInstruction(insn, 16, 3);
23878 if (!Check(S, DecodeVecShiftL8Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23881 tmp = fieldFromInstruction(insn, 0, 5);
23882 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23883 tmp = fieldFromInstruction(insn, 5, 5);
23884 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23885 tmp = fieldFromInstruction(insn, 16, 4);
23886 if (!Check(S, DecodeVecShiftR32ImmNarrow(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23889 tmp = fieldFromInstruction(insn, 0, 5);
23890 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23891 tmp = fieldFromInstruction(insn, 5, 5);
23892 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23893 tmp = fieldFromInstruction(insn, 16, 4);
23894 if (!Check(S, DecodeVecShiftL16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23897 tmp = fieldFromInstruction(insn, 0, 5);
23898 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23899 tmp = fieldFromInstruction(insn, 5, 5);
23900 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23901 tmp = fieldFromInstruction(insn, 16, 5);
23902 if (!Check(S, DecodeVecShiftR64ImmNarrow(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23905 tmp = fieldFromInstruction(insn, 0, 5);
23906 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23907 tmp = fieldFromInstruction(insn, 5, 5);
23908 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23909 tmp = fieldFromInstruction(insn, 16, 5);
23910 if (!Check(S, DecodeVecShiftL32Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23913 tmp = fieldFromInstruction(insn, 0, 5);
23914 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23915 tmp = fieldFromInstruction(insn, 0, 5);
23916 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23917 tmp = fieldFromInstruction(insn, 5, 5);
23918 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23919 tmp = fieldFromInstruction(insn, 16, 3);
23920 if (!Check(S, DecodeVecShiftL8Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23923 tmp = fieldFromInstruction(insn, 0, 5);
23924 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23925 tmp = fieldFromInstruction(insn, 0, 5);
23926 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23927 tmp = fieldFromInstruction(insn, 5, 5);
23928 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23929 tmp = fieldFromInstruction(insn, 16, 4);
23930 if (!Check(S, DecodeVecShiftL16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23933 tmp = fieldFromInstruction(insn, 0, 5);
23934 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23935 tmp = fieldFromInstruction(insn, 0, 5);
23936 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23937 tmp = fieldFromInstruction(insn, 5, 5);
23938 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23939 tmp = fieldFromInstruction(insn, 16, 5);
23940 if (!Check(S, DecodeVecShiftL32Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23943 tmp = fieldFromInstruction(insn, 0, 5);
23944 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23945 tmp = fieldFromInstruction(insn, 0, 5);
23946 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23947 tmp = fieldFromInstruction(insn, 5, 5);
23948 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23949 tmp = fieldFromInstruction(insn, 16, 4);
23950 if (!Check(S, DecodeFPR128_loRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23951 tmp = 0x0;
23952 tmp |= fieldFromInstruction(insn, 11, 1) << 2;
23953 tmp |= fieldFromInstruction(insn, 20, 2) << 0;
23954 MI.addOperand(MCOperand::createImm(tmp));
23957 tmp = fieldFromInstruction(insn, 0, 5);
23958 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23959 tmp = fieldFromInstruction(insn, 5, 5);
23960 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23961 tmp = fieldFromInstruction(insn, 16, 4);
23962 if (!Check(S, DecodeFPR128_loRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23963 tmp = 0x0;
23964 tmp |= fieldFromInstruction(insn, 11, 1) << 2;
23965 tmp |= fieldFromInstruction(insn, 20, 2) << 0;
23966 MI.addOperand(MCOperand::createImm(tmp));
23969 tmp = fieldFromInstruction(insn, 0, 5);
23970 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23971 tmp = fieldFromInstruction(insn, 5, 5);
23972 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23973 tmp = fieldFromInstruction(insn, 16, 3);
23974 if (!Check(S, DecodeVecShiftR8Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23977 tmp = fieldFromInstruction(insn, 0, 5);
23978 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23979 tmp = fieldFromInstruction(insn, 5, 5);
23980 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23981 tmp = fieldFromInstruction(insn, 16, 4);
23982 if (!Check(S, DecodeVecShiftR16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23985 tmp = fieldFromInstruction(insn, 0, 5);
23986 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23987 tmp = fieldFromInstruction(insn, 5, 5);
23988 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23989 tmp = fieldFromInstruction(insn, 16, 5);
23990 if (!Check(S, DecodeVecShiftR32Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23993 tmp = fieldFromInstruction(insn, 0, 5);
23994 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23995 tmp = fieldFromInstruction(insn, 0, 5);
23996 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23997 tmp = fieldFromInstruction(insn, 5, 5);
23998 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
23999 tmp = fieldFromInstruction(insn, 16, 3);
24000 if (!Check(S, DecodeVecShiftR8Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24003 tmp = fieldFromInstruction(insn, 0, 5);
24004 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24005 tmp = fieldFromInstruction(insn, 5, 5);
24006 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24007 tmp = fieldFromInstruction(insn, 16, 3);
24008 if (!Check(S, DecodeVecShiftL8Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24011 tmp = fieldFromInstruction(insn, 0, 5);
24012 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24013 tmp = fieldFromInstruction(insn, 0, 5);
24014 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24015 tmp = fieldFromInstruction(insn, 5, 5);
24016 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24017 tmp = fieldFromInstruction(insn, 16, 4);
24018 if (!Check(S, DecodeVecShiftR16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24021 tmp = fieldFromInstruction(insn, 0, 5);
24022 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24023 tmp = fieldFromInstruction(insn, 5, 5);
24024 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24025 tmp = fieldFromInstruction(insn, 16, 4);
24026 if (!Check(S, DecodeVecShiftL16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24029 tmp = fieldFromInstruction(insn, 0, 5);
24030 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24031 tmp = fieldFromInstruction(insn, 0, 5);
24032 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24033 tmp = fieldFromInstruction(insn, 5, 5);
24034 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24035 tmp = fieldFromInstruction(insn, 16, 5);
24036 if (!Check(S, DecodeVecShiftR32Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24039 tmp = fieldFromInstruction(insn, 0, 5);
24040 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24041 tmp = fieldFromInstruction(insn, 5, 5);
24042 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24043 tmp = fieldFromInstruction(insn, 16, 5);
24044 if (!Check(S, DecodeVecShiftL32Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24047 tmp = fieldFromInstruction(insn, 0, 5);
24048 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24049 tmp = fieldFromInstruction(insn, 0, 5);
24050 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24051 tmp = fieldFromInstruction(insn, 5, 5);
24052 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24053 tmp = fieldFromInstruction(insn, 16, 3);
24054 if (!Check(S, DecodeVecShiftR16ImmNarrow(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24057 tmp = fieldFromInstruction(insn, 0, 5);
24058 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24059 tmp = fieldFromInstruction(insn, 0, 5);
24060 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24061 tmp = fieldFromInstruction(insn, 5, 5);
24062 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24063 tmp = fieldFromInstruction(insn, 16, 4);
24064 if (!Check(S, DecodeVecShiftR32ImmNarrow(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24067 tmp = fieldFromInstruction(insn, 0, 5);
24068 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24069 tmp = fieldFromInstruction(insn, 0, 5);
24070 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24071 tmp = fieldFromInstruction(insn, 5, 5);
24072 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24073 tmp = fieldFromInstruction(insn, 16, 5);
24074 if (!Check(S, DecodeVecShiftR64ImmNarrow(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24077 tmp = fieldFromInstruction(insn, 0, 5);
24078 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24079 tmp = fieldFromInstruction(insn, 0, 5);
24080 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24081 tmp = fieldFromInstruction(insn, 5, 5);
24082 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24083 tmp = fieldFromInstruction(insn, 16, 3);
24084 if (!Check(S, DecodeVecShiftL8Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24087 tmp = fieldFromInstruction(insn, 0, 5);
24088 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24089 tmp = fieldFromInstruction(insn, 0, 5);
24090 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24091 tmp = fieldFromInstruction(insn, 5, 5);
24092 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24093 tmp = fieldFromInstruction(insn, 16, 4);
24094 if (!Check(S, DecodeVecShiftL16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24097 tmp = fieldFromInstruction(insn, 0, 5);
24098 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24099 tmp = fieldFromInstruction(insn, 0, 5);
24100 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24101 tmp = fieldFromInstruction(insn, 5, 5);
24102 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24103 tmp = fieldFromInstruction(insn, 16, 5);
24104 if (!Check(S, DecodeVecShiftL32Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24107 tmp = fieldFromInstruction(insn, 0, 5);
24108 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24109 tmp = fieldFromInstruction(insn, 0, 5);
24110 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24111 tmp = fieldFromInstruction(insn, 5, 5);
24112 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24113 tmp = fieldFromInstruction(insn, 16, 4);
24114 if (!Check(S, DecodeFPR128_loRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24115 tmp = 0x0;
24116 tmp |= fieldFromInstruction(insn, 11, 1) << 2;
24117 tmp |= fieldFromInstruction(insn, 20, 2) << 0;
24118 MI.addOperand(MCOperand::createImm(tmp));
24121 tmp = fieldFromInstruction(insn, 0, 5);
24122 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24123 tmp = fieldFromInstruction(insn, 5, 5);
24124 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24125 tmp = fieldFromInstruction(insn, 16, 4);
24126 if (!Check(S, DecodeFPR128_loRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24127 tmp = 0x0;
24128 tmp |= fieldFromInstruction(insn, 11, 1) << 2;
24129 tmp |= fieldFromInstruction(insn, 20, 2) << 0;
24130 MI.addOperand(MCOperand::createImm(tmp));
24133 tmp = fieldFromInstruction(insn, 0, 5);
24134 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24135 tmp = fieldFromInstruction(insn, 0, 5);
24136 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24137 tmp = fieldFromInstruction(insn, 5, 5);
24138 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24139 tmp = fieldFromInstruction(insn, 16, 5);
24140 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24141 tmp = fieldFromInstruction(insn, 21, 1);
24142 MI.addOperand(MCOperand::createImm(tmp));
24143 tmp = fieldFromInstruction(insn, 13, 2);
24144 MI.addOperand(MCOperand::createImm(tmp));
24147 tmp = fieldFromInstruction(insn, 0, 5);
24148 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24149 tmp = fieldFromInstruction(insn, 5, 5);
24150 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24151 tmp = fieldFromInstruction(insn, 16, 6);
24152 if (!Check(S, DecodeVecShiftR64Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24155 tmp = fieldFromInstruction(insn, 0, 5);
24156 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24157 tmp = fieldFromInstruction(insn, 0, 5);
24158 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24159 tmp = fieldFromInstruction(insn, 5, 5);
24160 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24161 tmp = fieldFromInstruction(insn, 16, 6);
24162 if (!Check(S, DecodeVecShiftR64Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24165 tmp = fieldFromInstruction(insn, 0, 5);
24166 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24167 tmp = fieldFromInstruction(insn, 5, 5);
24168 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24169 tmp = fieldFromInstruction(insn, 16, 6);
24170 if (!Check(S, DecodeVecShiftL64Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24173 tmp = fieldFromInstruction(insn, 0, 5);
24174 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24175 tmp = fieldFromInstruction(insn, 0, 5);
24176 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24177 tmp = fieldFromInstruction(insn, 5, 5);
24178 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24179 tmp = fieldFromInstruction(insn, 16, 5);
24180 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24181 tmp = 0x0;
24182 tmp |= fieldFromInstruction(insn, 11, 1) << 1;
24183 tmp |= fieldFromInstruction(insn, 21, 1) << 0;
24184 MI.addOperand(MCOperand::createImm(tmp));
24185 tmp = fieldFromInstruction(insn, 13, 2);
24186 MI.addOperand(MCOperand::createImm(tmp));
24189 tmp = fieldFromInstruction(insn, 0, 5);
24190 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24191 tmp = fieldFromInstruction(insn, 0, 5);
24192 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24193 tmp = fieldFromInstruction(insn, 5, 5);
24194 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24195 tmp = fieldFromInstruction(insn, 16, 6);
24196 if (!Check(S, DecodeVecShiftL64Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24199 tmp = fieldFromInstruction(insn, 0, 5);
24200 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24201 tmp = fieldFromInstruction(insn, 0, 5);
24202 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24203 tmp = fieldFromInstruction(insn, 5, 5);
24204 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24205 tmp = fieldFromInstruction(insn, 16, 4);
24206 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24207 tmp = 0x0;
24208 tmp |= fieldFromInstruction(insn, 11, 1) << 2;
24209 tmp |= fieldFromInstruction(insn, 20, 2) << 0;
24210 MI.addOperand(MCOperand::createImm(tmp));
24213 tmp = fieldFromInstruction(insn, 0, 5);
24214 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24215 tmp = fieldFromInstruction(insn, 0, 5);
24216 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24217 tmp = fieldFromInstruction(insn, 5, 5);
24218 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24219 tmp = fieldFromInstruction(insn, 16, 5);
24220 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24221 tmp = 0x0;
24222 tmp |= fieldFromInstruction(insn, 11, 1) << 1;
24223 tmp |= fieldFromInstruction(insn, 21, 1) << 0;
24224 MI.addOperand(MCOperand::createImm(tmp));
24227 tmp = fieldFromInstruction(insn, 0, 5);
24228 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24229 tmp = fieldFromInstruction(insn, 0, 5);
24230 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24231 tmp = fieldFromInstruction(insn, 5, 5);
24232 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24233 tmp = fieldFromInstruction(insn, 16, 5);
24234 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24235 tmp = 0x0;
24236 tmp |= fieldFromInstruction(insn, 11, 1) << 1;
24237 tmp |= fieldFromInstruction(insn, 21, 1) << 0;
24238 MI.addOperand(MCOperand::createImm(tmp));
24241 tmp = fieldFromInstruction(insn, 0, 5);
24242 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24243 tmp = fieldFromInstruction(insn, 5, 5);
24244 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24245 tmp = fieldFromInstruction(insn, 16, 5);
24246 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24247 tmp = 0x0;
24248 tmp |= fieldFromInstruction(insn, 11, 1) << 1;
24249 tmp |= fieldFromInstruction(insn, 21, 1) << 0;
24250 MI.addOperand(MCOperand::createImm(tmp));
24253 tmp = fieldFromInstruction(insn, 0, 5);
24254 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24255 tmp = fieldFromInstruction(insn, 5, 5);
24256 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24257 tmp = fieldFromInstruction(insn, 16, 5);
24258 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24259 tmp = 0x0;
24260 tmp |= fieldFromInstruction(insn, 11, 1) << 1;
24261 tmp |= fieldFromInstruction(insn, 21, 1) << 0;
24262 MI.addOperand(MCOperand::createImm(tmp));
24265 tmp = fieldFromInstruction(insn, 0, 5);
24266 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24267 tmp = fieldFromInstruction(insn, 0, 5);
24268 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24269 tmp = fieldFromInstruction(insn, 5, 5);
24270 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24271 tmp = fieldFromInstruction(insn, 16, 4);
24272 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24273 tmp = 0x0;
24274 tmp |= fieldFromInstruction(insn, 11, 1) << 2;
24275 tmp |= fieldFromInstruction(insn, 20, 2) << 0;
24276 MI.addOperand(MCOperand::createImm(tmp));
24279 tmp = fieldFromInstruction(insn, 0, 5);
24280 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24281 tmp = fieldFromInstruction(insn, 0, 5);
24282 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24283 tmp = fieldFromInstruction(insn, 5, 5);
24284 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24285 tmp = fieldFromInstruction(insn, 16, 5);
24286 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24287 tmp = 0x0;
24288 tmp |= fieldFromInstruction(insn, 11, 1) << 1;
24289 tmp |= fieldFromInstruction(insn, 21, 1) << 0;
24290 MI.addOperand(MCOperand::createImm(tmp));
24293 tmp = fieldFromInstruction(insn, 0, 5);
24294 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24295 tmp = fieldFromInstruction(insn, 5, 5);
24296 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24297 tmp = fieldFromInstruction(insn, 16, 5);
24298 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24299 tmp = 0x0;
24300 tmp |= fieldFromInstruction(insn, 11, 1) << 1;
24301 tmp |= fieldFromInstruction(insn, 21, 1) << 0;
24302 MI.addOperand(MCOperand::createImm(tmp));
24305 tmp = fieldFromInstruction(insn, 0, 5);
24306 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24307 tmp = fieldFromInstruction(insn, 0, 5);
24308 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24309 tmp = fieldFromInstruction(insn, 5, 5);
24310 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24311 tmp = fieldFromInstruction(insn, 16, 5);
24312 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24313 tmp = fieldFromInstruction(insn, 11, 1);
24314 MI.addOperand(MCOperand::createImm(tmp));
24315 tmp = fieldFromInstruction(insn, 13, 2);
24316 MI.addOperand(MCOperand::createImm(tmp));
24319 tmp = fieldFromInstruction(insn, 0, 5);
24320 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24321 tmp = fieldFromInstruction(insn, 0, 5);
24322 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24323 tmp = fieldFromInstruction(insn, 5, 5);
24324 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24325 tmp = fieldFromInstruction(insn, 16, 5);
24326 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24327 tmp = fieldFromInstruction(insn, 11, 1);
24328 MI.addOperand(MCOperand::createImm(tmp));
24331 tmp = fieldFromInstruction(insn, 0, 5);
24332 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24333 tmp = fieldFromInstruction(insn, 5, 5);
24334 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24335 tmp = fieldFromInstruction(insn, 16, 5);
24336 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24337 tmp = fieldFromInstruction(insn, 11, 1);
24338 MI.addOperand(MCOperand::createImm(tmp));
24347 tmp = fieldFromInstruction(insn, 0, 5);
24348 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24349 tmp = fieldFromInstruction(insn, 5, 5);
24350 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24351 tmp = fieldFromInstruction(insn, 16, 6);
24352 MI.addOperand(MCOperand::createImm(tmp));
24353 tmp = fieldFromInstruction(insn, 10, 4);
24354 MI.addOperand(MCOperand::createImm(tmp));
24363 tmp = fieldFromInstruction(insn, 0, 5);
24364 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24365 tmp = fieldFromInstruction(insn, 5, 5);
24366 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24367 tmp = fieldFromInstruction(insn, 16, 5);
24368 MI.addOperand(MCOperand::createImm(tmp));
24369 tmp = fieldFromInstruction(insn, 10, 5);
24370 MI.addOperand(MCOperand::createImm(tmp));
24373 tmp = fieldFromInstruction(insn, 0, 5);
24374 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24375 tmp = fieldFromInstruction(insn, 5, 5);
24376 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24377 tmp = fieldFromInstruction(insn, 16, 5);
24378 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24379 tmp = fieldFromInstruction(insn, 10, 5);
24380 MI.addOperand(MCOperand::createImm(tmp));
24383 tmp = fieldFromInstruction(insn, 0, 5);
24384 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24385 tmp = fieldFromInstruction(insn, 0, 5);
24386 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24387 tmp = fieldFromInstruction(insn, 5, 5);
24388 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24389 tmp = fieldFromInstruction(insn, 16, 5);
24390 MI.addOperand(MCOperand::createImm(tmp));
24391 tmp = fieldFromInstruction(insn, 10, 5);
24392 MI.addOperand(MCOperand::createImm(tmp));
24395 tmp = fieldFromInstruction(insn, 0, 5);
24396 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24397 tmp = fieldFromInstruction(insn, 5, 5);
24398 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24399 tmp = fieldFromInstruction(insn, 16, 6);
24400 MI.addOperand(MCOperand::createImm(tmp));
24401 tmp = fieldFromInstruction(insn, 10, 6);
24402 MI.addOperand(MCOperand::createImm(tmp));
24405 tmp = fieldFromInstruction(insn, 0, 5);
24406 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24407 tmp = fieldFromInstruction(insn, 5, 5);
24408 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24409 tmp = fieldFromInstruction(insn, 16, 5);
24410 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24411 tmp = fieldFromInstruction(insn, 10, 6);
24412 MI.addOperand(MCOperand::createImm(tmp));
24415 tmp = fieldFromInstruction(insn, 0, 5);
24416 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24417 tmp = fieldFromInstruction(insn, 0, 5);
24418 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24419 tmp = fieldFromInstruction(insn, 5, 5);
24420 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24421 tmp = fieldFromInstruction(insn, 16, 6);
24422 MI.addOperand(MCOperand::createImm(tmp));
24423 tmp = fieldFromInstruction(insn, 10, 6);
24424 MI.addOperand(MCOperand::createImm(tmp));
24430 tmp = fieldFromInstruction(insn, 0, 5);
24431 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24432 tmp = fieldFromInstruction(insn, 5, 19);
24433 if (!Check(S, DecodePCRelLabel19(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24439 tmp = fieldFromInstruction(insn, 0, 4);
24440 MI.addOperand(MCOperand::createImm(tmp));
24441 tmp = fieldFromInstruction(insn, 5, 19);
24442 if (!Check(S, DecodePCRelLabel19(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24445 tmp = fieldFromInstruction(insn, 0, 5);
24446 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24447 tmp = fieldFromInstruction(insn, 5, 19);
24448 if (!Check(S, DecodePCRelLabel19(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24451 tmp = fieldFromInstruction(insn, 5, 16);
24452 MI.addOperand(MCOperand::createImm(tmp));
24455 tmp = fieldFromInstruction(insn, 8, 4);
24456 MI.addOperand(MCOperand::createImm(tmp));
24459 tmp = fieldFromInstruction(insn, 5, 7);
24460 MI.addOperand(MCOperand::createImm(tmp));
24466 tmp = fieldFromInstruction(insn, 16, 3);
24467 MI.addOperand(MCOperand::createImm(tmp));
24468 tmp = fieldFromInstruction(insn, 12, 4);
24469 MI.addOperand(MCOperand::createImm(tmp));
24470 tmp = fieldFromInstruction(insn, 8, 4);
24471 MI.addOperand(MCOperand::createImm(tmp));
24472 tmp = fieldFromInstruction(insn, 5, 3);
24473 MI.addOperand(MCOperand::createImm(tmp));
24474 tmp = fieldFromInstruction(insn, 0, 5);
24475 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24478 tmp = fieldFromInstruction(insn, 5, 16);
24479 if (!Check(S, DecodeMSRSystemRegister(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24480 tmp = fieldFromInstruction(insn, 0, 5);
24481 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24484 tmp = fieldFromInstruction(insn, 0, 5);
24485 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24488 tmp = fieldFromInstruction(insn, 0, 5);
24489 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24490 tmp = fieldFromInstruction(insn, 16, 3);
24491 MI.addOperand(MCOperand::createImm(tmp));
24492 tmp = fieldFromInstruction(insn, 12, 4);
24493 MI.addOperand(MCOperand::createImm(tmp));
24494 tmp = fieldFromInstruction(insn, 8, 4);
24495 MI.addOperand(MCOperand::createImm(tmp));
24496 tmp = fieldFromInstruction(insn, 5, 3);
24497 MI.addOperand(MCOperand::createImm(tmp));
24500 tmp = fieldFromInstruction(insn, 0, 5);
24501 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24502 tmp = fieldFromInstruction(insn, 5, 16);
24503 if (!Check(S, DecodeMRSSystemRegister(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24506 tmp = fieldFromInstruction(insn, 5, 5);
24507 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24510 tmp = fieldFromInstruction(insn, 5, 5);
24511 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24512 tmp = fieldFromInstruction(insn, 0, 5);
24513 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24519 tmp = fieldFromInstruction(insn, 0, 5);
24520 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24521 tmp = fieldFromInstruction(insn, 5, 5);
24522 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24523 tmp = fieldFromInstruction(insn, 16, 5);
24524 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24527 tmp = fieldFromInstruction(insn, 0, 5);
24528 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24529 tmp = fieldFromInstruction(insn, 5, 5);
24530 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24531 tmp = fieldFromInstruction(insn, 16, 5);
24532 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24533 tmp = fieldFromInstruction(insn, 12, 4);
24534 MI.addOperand(MCOperand::createImm(tmp));
24537 tmp = fieldFromInstruction(insn, 0, 5);
24538 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24539 tmp = fieldFromInstruction(insn, 5, 5);
24540 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24541 tmp = fieldFromInstruction(insn, 16, 5);
24542 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24543 tmp = fieldFromInstruction(insn, 10, 5);
24544 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24547 tmp = fieldFromInstruction(insn, 0, 5);
24548 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24549 tmp = fieldFromInstruction(insn, 16, 5);
24550 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24551 tmp = fieldFromInstruction(insn, 5, 5);
24552 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24555 tmp = fieldFromInstruction(insn, 0, 5);
24556 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24557 tmp = fieldFromInstruction(insn, 5, 5);
24558 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24559 tmp = fieldFromInstruction(insn, 16, 5);
24560 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24561 tmp = 0x0;
24562 tmp |= fieldFromInstruction(insn, 12, 1) << 0;
24563 tmp |= fieldFromInstruction(insn, 15, 1) << 1;
24564 if (!Check(S, DecodeMemExtend(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24567 tmp = fieldFromInstruction(insn, 0, 5);
24568 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24569 tmp = fieldFromInstruction(insn, 5, 5);
24570 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24571 tmp = fieldFromInstruction(insn, 16, 5);
24572 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24573 tmp = 0x0;
24574 tmp |= fieldFromInstruction(insn, 12, 1) << 0;
24575 tmp |= fieldFromInstruction(insn, 15, 1) << 1;
24576 if (!Check(S, DecodeMemExtend(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24579 tmp = fieldFromInstruction(insn, 0, 5);
24580 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24581 tmp = fieldFromInstruction(insn, 5, 5);
24582 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24585 tmp = fieldFromInstruction(insn, 0, 5);
24586 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24587 tmp = fieldFromInstruction(insn, 5, 5);
24588 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24589 tmp = fieldFromInstruction(insn, 16, 5);
24590 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24591 tmp = 0x0;
24592 tmp |= fieldFromInstruction(insn, 12, 1) << 0;
24593 tmp |= fieldFromInstruction(insn, 15, 1) << 1;
24594 if (!Check(S, DecodeMemExtend(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24597 tmp = fieldFromInstruction(insn, 0, 5);
24598 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24599 tmp = fieldFromInstruction(insn, 5, 5);
24600 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24601 tmp = fieldFromInstruction(insn, 16, 5);
24602 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24603 tmp = 0x0;
24604 tmp |= fieldFromInstruction(insn, 12, 1) << 0;
24605 tmp |= fieldFromInstruction(insn, 15, 1) << 1;
24606 if (!Check(S, DecodeMemExtend(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24612 tmp = fieldFromInstruction(insn, 5, 5);
24613 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24616 tmp = fieldFromInstruction(insn, 5, 5);
24617 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24618 tmp = fieldFromInstruction(insn, 16, 5);
24619 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24620 tmp = fieldFromInstruction(insn, 0, 4);
24621 MI.addOperand(MCOperand::createImm(tmp));
24622 tmp = fieldFromInstruction(insn, 12, 4);
24623 MI.addOperand(MCOperand::createImm(tmp));
24626 tmp = fieldFromInstruction(insn, 5, 5);
24627 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24628 tmp = fieldFromInstruction(insn, 16, 5);
24629 MI.addOperand(MCOperand::createImm(tmp));
24630 tmp = fieldFromInstruction(insn, 0, 4);
24631 MI.addOperand(MCOperand::createImm(tmp));
24632 tmp = fieldFromInstruction(insn, 12, 4);
24633 MI.addOperand(MCOperand::createImm(tmp));
24636 tmp = fieldFromInstruction(insn, 0, 5);
24637 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24638 tmp = fieldFromInstruction(insn, 5, 5);
24639 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24642 tmp = fieldFromInstruction(insn, 0, 5);
24643 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24644 tmp = fieldFromInstruction(insn, 5, 5);
24645 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24646 tmp = fieldFromInstruction(insn, 16, 5);
24647 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24650 tmp = fieldFromInstruction(insn, 0, 5);
24651 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24652 tmp = fieldFromInstruction(insn, 5, 5);
24653 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24654 tmp = fieldFromInstruction(insn, 16, 5);
24655 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24656 tmp = fieldFromInstruction(insn, 12, 4);
24657 MI.addOperand(MCOperand::createImm(tmp));
24660 tmp = fieldFromInstruction(insn, 0, 5);
24661 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24662 tmp = fieldFromInstruction(insn, 5, 5);
24663 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24664 tmp = fieldFromInstruction(insn, 16, 5);
24665 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24668 tmp = fieldFromInstruction(insn, 0, 5);
24669 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24670 tmp = fieldFromInstruction(insn, 5, 5);
24671 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24672 tmp = fieldFromInstruction(insn, 16, 5);
24673 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24676 tmp = fieldFromInstruction(insn, 0, 5);
24677 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24678 tmp = fieldFromInstruction(insn, 5, 5);
24679 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24680 tmp = fieldFromInstruction(insn, 16, 5);
24681 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24684 tmp = fieldFromInstruction(insn, 0, 5);
24685 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24686 tmp = fieldFromInstruction(insn, 5, 5);
24687 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24688 tmp = fieldFromInstruction(insn, 16, 5);
24689 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24692 tmp = fieldFromInstruction(insn, 0, 5);
24693 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24694 tmp = fieldFromInstruction(insn, 5, 5);
24695 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24696 tmp = fieldFromInstruction(insn, 16, 5);
24697 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24700 tmp = fieldFromInstruction(insn, 0, 5);
24701 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24702 tmp = fieldFromInstruction(insn, 5, 5);
24703 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24704 tmp = fieldFromInstruction(insn, 16, 5);
24705 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24706 tmp = fieldFromInstruction(insn, 10, 5);
24707 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24710 tmp = fieldFromInstruction(insn, 0, 5);
24711 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24712 tmp = fieldFromInstruction(insn, 5, 5);
24713 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24714 tmp = fieldFromInstruction(insn, 16, 5);
24715 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24716 tmp = fieldFromInstruction(insn, 10, 5);
24717 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24720 tmp = fieldFromInstruction(insn, 5, 5);
24721 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24722 tmp = fieldFromInstruction(insn, 15, 6);
24723 MI.addOperand(MCOperand::createImm(tmp));
24724 tmp = fieldFromInstruction(insn, 0, 4);
24725 MI.addOperand(MCOperand::createImm(tmp));
24728 tmp = fieldFromInstruction(insn, 5, 5);
24729 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24730 tmp = fieldFromInstruction(insn, 16, 5);
24731 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24732 tmp = fieldFromInstruction(insn, 0, 4);
24733 MI.addOperand(MCOperand::createImm(tmp));
24734 tmp = fieldFromInstruction(insn, 12, 4);
24735 MI.addOperand(MCOperand::createImm(tmp));
24738 tmp = fieldFromInstruction(insn, 5, 5);
24739 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24740 tmp = fieldFromInstruction(insn, 16, 5);
24741 MI.addOperand(MCOperand::createImm(tmp));
24742 tmp = fieldFromInstruction(insn, 0, 4);
24743 MI.addOperand(MCOperand::createImm(tmp));
24744 tmp = fieldFromInstruction(insn, 12, 4);
24745 MI.addOperand(MCOperand::createImm(tmp));
24748 tmp = fieldFromInstruction(insn, 0, 5);
24749 MI.addOperand(MCOperand::createImm(tmp));
24750 tmp = fieldFromInstruction(insn, 5, 19);
24751 if (!Check(S, DecodePCRelLabel19(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24754 tmp = fieldFromInstruction(insn, 0, 5);
24755 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24756 tmp = fieldFromInstruction(insn, 5, 5);
24757 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24760 tmp = fieldFromInstruction(insn, 5, 5);
24761 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24762 tmp = fieldFromInstruction(insn, 0, 5);
24763 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24764 tmp = fieldFromInstruction(insn, 5, 5);
24765 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24766 tmp = fieldFromInstruction(insn, 12, 9);
24767 if (!Check(S, DecodeSImm<9>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24770 tmp = fieldFromInstruction(insn, 0, 5);
24771 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24772 tmp = fieldFromInstruction(insn, 5, 5);
24773 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24774 tmp = fieldFromInstruction(insn, 12, 9);
24775 if (!Check(S, DecodeSImm<9>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24778 tmp = fieldFromInstruction(insn, 0, 5);
24779 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24780 tmp = fieldFromInstruction(insn, 0, 5);
24781 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24782 tmp = fieldFromInstruction(insn, 5, 5);
24783 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24784 tmp = fieldFromInstruction(insn, 12, 9);
24785 if (!Check(S, DecodeSImm<9>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24788 tmp = fieldFromInstruction(insn, 0, 5);
24789 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24790 tmp = fieldFromInstruction(insn, 5, 5);
24791 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24794 tmp = fieldFromInstruction(insn, 0, 5);
24795 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24796 tmp = fieldFromInstruction(insn, 16, 5);
24797 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24798 tmp = fieldFromInstruction(insn, 5, 5);
24799 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24802 tmp = fieldFromInstruction(insn, 0, 5);
24803 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24804 tmp = fieldFromInstruction(insn, 5, 5);
24805 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24806 tmp = 0x0;
24807 tmp |= fieldFromInstruction(insn, 12, 9) << 0;
24808 tmp |= fieldFromInstruction(insn, 22, 1) << 9;
24809 if (!Check(S, DecodeSImm<10>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24812 tmp = fieldFromInstruction(insn, 5, 5);
24813 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24814 tmp = fieldFromInstruction(insn, 0, 5);
24815 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24816 tmp = fieldFromInstruction(insn, 5, 5);
24817 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24818 tmp = 0x0;
24819 tmp |= fieldFromInstruction(insn, 12, 9) << 0;
24820 tmp |= fieldFromInstruction(insn, 22, 1) << 9;
24821 if (!Check(S, DecodeSImm<10>(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24824 tmp = fieldFromInstruction(insn, 0, 5);
24825 MI.addOperand(MCOperand::createImm(tmp));
24826 tmp = fieldFromInstruction(insn, 5, 5);
24827 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24828 tmp = fieldFromInstruction(insn, 16, 5);
24829 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24830 tmp = 0x0;
24831 tmp |= fieldFromInstruction(insn, 12, 1) << 0;
24832 tmp |= fieldFromInstruction(insn, 15, 1) << 1;
24833 if (!Check(S, DecodeMemExtend(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24836 tmp = fieldFromInstruction(insn, 0, 5);
24837 MI.addOperand(MCOperand::createImm(tmp));
24838 tmp = fieldFromInstruction(insn, 5, 5);
24839 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24840 tmp = fieldFromInstruction(insn, 16, 5);
24841 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24842 tmp = 0x0;
24843 tmp |= fieldFromInstruction(insn, 12, 1) << 0;
24844 tmp |= fieldFromInstruction(insn, 15, 1) << 1;
24845 if (!Check(S, DecodeMemExtend(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24848 tmp = fieldFromInstruction(insn, 0, 5);
24849 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24850 tmp = fieldFromInstruction(insn, 5, 19);
24851 if (!Check(S, DecodePCRelLabel19(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24854 tmp = fieldFromInstruction(insn, 0, 5);
24855 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24856 tmp = fieldFromInstruction(insn, 5, 5);
24857 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24858 tmp = 0x20;
24859 tmp |= fieldFromInstruction(insn, 10, 5);
24860 if (!Check(S, DecodeFixedPointScaleImm32(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24863 tmp = fieldFromInstruction(insn, 0, 5);
24864 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24865 tmp = fieldFromInstruction(insn, 5, 5);
24866 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24867 tmp = 0x20;
24868 tmp |= fieldFromInstruction(insn, 10, 5);
24869 if (!Check(S, DecodeFixedPointScaleImm32(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24872 tmp = fieldFromInstruction(insn, 0, 5);
24873 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24874 tmp = fieldFromInstruction(insn, 5, 5);
24875 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24878 tmp = fieldFromInstruction(insn, 0, 5);
24879 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24880 tmp = fieldFromInstruction(insn, 5, 5);
24881 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24884 tmp = fieldFromInstruction(insn, 5, 5);
24885 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24886 tmp = fieldFromInstruction(insn, 16, 5);
24887 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24890 tmp = fieldFromInstruction(insn, 5, 5);
24891 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24894 tmp = fieldFromInstruction(insn, 0, 5);
24895 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24896 tmp = fieldFromInstruction(insn, 5, 5);
24897 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24900 tmp = fieldFromInstruction(insn, 0, 5);
24901 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24902 tmp = fieldFromInstruction(insn, 5, 5);
24903 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24906 tmp = fieldFromInstruction(insn, 0, 5);
24907 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24908 tmp = fieldFromInstruction(insn, 5, 5);
24909 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24912 tmp = fieldFromInstruction(insn, 0, 5);
24913 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24914 tmp = fieldFromInstruction(insn, 13, 8);
24915 MI.addOperand(MCOperand::createImm(tmp));
24918 tmp = fieldFromInstruction(insn, 5, 5);
24919 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24920 tmp = fieldFromInstruction(insn, 16, 5);
24921 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24922 tmp = fieldFromInstruction(insn, 0, 4);
24923 MI.addOperand(MCOperand::createImm(tmp));
24924 tmp = fieldFromInstruction(insn, 12, 4);
24925 MI.addOperand(MCOperand::createImm(tmp));
24928 tmp = fieldFromInstruction(insn, 0, 5);
24929 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24930 tmp = fieldFromInstruction(insn, 5, 5);
24931 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24932 tmp = fieldFromInstruction(insn, 16, 5);
24933 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24936 tmp = fieldFromInstruction(insn, 0, 5);
24937 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24938 tmp = fieldFromInstruction(insn, 5, 5);
24939 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24940 tmp = fieldFromInstruction(insn, 16, 5);
24941 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24942 tmp = fieldFromInstruction(insn, 12, 4);
24943 MI.addOperand(MCOperand::createImm(tmp));
24946 tmp = fieldFromInstruction(insn, 0, 5);
24947 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24948 tmp = fieldFromInstruction(insn, 5, 5);
24949 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24950 tmp = 0x20;
24951 tmp |= fieldFromInstruction(insn, 10, 5);
24952 if (!Check(S, DecodeFixedPointScaleImm32(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24955 tmp = fieldFromInstruction(insn, 0, 5);
24956 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24957 tmp = fieldFromInstruction(insn, 5, 5);
24958 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24959 tmp = 0x20;
24960 tmp |= fieldFromInstruction(insn, 10, 5);
24961 if (!Check(S, DecodeFixedPointScaleImm32(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24964 tmp = fieldFromInstruction(insn, 0, 5);
24965 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24966 tmp = fieldFromInstruction(insn, 5, 5);
24967 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24970 tmp = fieldFromInstruction(insn, 5, 5);
24971 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24972 tmp = fieldFromInstruction(insn, 16, 5);
24973 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24976 tmp = fieldFromInstruction(insn, 5, 5);
24977 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24980 tmp = fieldFromInstruction(insn, 0, 5);
24981 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24982 tmp = fieldFromInstruction(insn, 13, 8);
24983 MI.addOperand(MCOperand::createImm(tmp));
24986 tmp = fieldFromInstruction(insn, 5, 5);
24987 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24988 tmp = fieldFromInstruction(insn, 16, 5);
24989 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24990 tmp = fieldFromInstruction(insn, 0, 4);
24991 MI.addOperand(MCOperand::createImm(tmp));
24992 tmp = fieldFromInstruction(insn, 12, 4);
24993 MI.addOperand(MCOperand::createImm(tmp));
24996 tmp = fieldFromInstruction(insn, 0, 5);
24997 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
24998 tmp = fieldFromInstruction(insn, 5, 5);
24999 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25000 tmp = fieldFromInstruction(insn, 16, 5);
25001 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25002 tmp = fieldFromInstruction(insn, 12, 4);
25003 MI.addOperand(MCOperand::createImm(tmp));
25006 tmp = fieldFromInstruction(insn, 0, 5);
25007 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25008 tmp = fieldFromInstruction(insn, 5, 5);
25009 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25010 tmp = 0x20;
25011 tmp |= fieldFromInstruction(insn, 10, 5);
25012 if (!Check(S, DecodeFixedPointScaleImm32(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25015 tmp = fieldFromInstruction(insn, 0, 5);
25016 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25017 tmp = fieldFromInstruction(insn, 5, 5);
25018 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25019 tmp = 0x20;
25020 tmp |= fieldFromInstruction(insn, 10, 5);
25021 if (!Check(S, DecodeFixedPointScaleImm32(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25024 tmp = fieldFromInstruction(insn, 0, 5);
25025 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25026 tmp = fieldFromInstruction(insn, 5, 5);
25027 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25030 tmp = fieldFromInstruction(insn, 0, 5);
25031 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25032 tmp = fieldFromInstruction(insn, 5, 5);
25033 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25036 tmp = fieldFromInstruction(insn, 5, 5);
25037 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25038 tmp = fieldFromInstruction(insn, 16, 5);
25039 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25042 tmp = fieldFromInstruction(insn, 5, 5);
25043 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25046 tmp = fieldFromInstruction(insn, 0, 5);
25047 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25048 tmp = fieldFromInstruction(insn, 5, 5);
25049 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25052 tmp = fieldFromInstruction(insn, 0, 5);
25053 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25054 tmp = fieldFromInstruction(insn, 5, 5);
25055 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25058 tmp = fieldFromInstruction(insn, 0, 5);
25059 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25060 tmp = fieldFromInstruction(insn, 5, 5);
25061 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25064 tmp = fieldFromInstruction(insn, 0, 5);
25065 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25066 tmp = fieldFromInstruction(insn, 13, 8);
25067 MI.addOperand(MCOperand::createImm(tmp));
25070 tmp = fieldFromInstruction(insn, 5, 5);
25071 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25072 tmp = fieldFromInstruction(insn, 16, 5);
25073 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25074 tmp = fieldFromInstruction(insn, 0, 4);
25075 MI.addOperand(MCOperand::createImm(tmp));
25076 tmp = fieldFromInstruction(insn, 12, 4);
25077 MI.addOperand(MCOperand::createImm(tmp));
25080 tmp = fieldFromInstruction(insn, 0, 5);
25081 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25082 tmp = fieldFromInstruction(insn, 5, 5);
25083 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25084 tmp = fieldFromInstruction(insn, 16, 5);
25085 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25088 tmp = fieldFromInstruction(insn, 0, 5);
25089 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25090 tmp = fieldFromInstruction(insn, 5, 5);
25091 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25092 tmp = fieldFromInstruction(insn, 16, 5);
25093 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25094 tmp = fieldFromInstruction(insn, 12, 4);
25095 MI.addOperand(MCOperand::createImm(tmp));
25098 tmp = fieldFromInstruction(insn, 0, 5);
25099 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25100 tmp = fieldFromInstruction(insn, 5, 5);
25101 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25102 tmp = fieldFromInstruction(insn, 16, 5);
25103 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25104 tmp = fieldFromInstruction(insn, 10, 5);
25105 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25108 tmp = fieldFromInstruction(insn, 0, 5);
25109 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25110 tmp = fieldFromInstruction(insn, 5, 5);
25111 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25112 tmp = fieldFromInstruction(insn, 16, 5);
25113 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25114 tmp = fieldFromInstruction(insn, 10, 5);
25115 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25118 tmp = fieldFromInstruction(insn, 0, 5);
25119 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25120 tmp = fieldFromInstruction(insn, 5, 5);
25121 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25122 tmp = fieldFromInstruction(insn, 16, 5);
25123 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25124 tmp = fieldFromInstruction(insn, 10, 5);
25125 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25128 tmp = fieldFromInstruction(insn, 0, 5);
25129 if (!Check(S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25130 tmp = fieldFromInstruction(insn, 5, 5);
25131 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25132 tmp = fieldFromInstruction(insn, 16, 5);
25133 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25134 tmp = 0x0;
25135 tmp |= fieldFromInstruction(insn, 12, 1) << 0;
25136 tmp |= fieldFromInstruction(insn, 15, 1) << 1;
25137 if (!Check(S, DecodeMemExtend(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25140 tmp = fieldFromInstruction(insn, 0, 5);
25141 if (!Check(S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25142 tmp = fieldFromInstruction(insn, 5, 5);
25143 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25144 tmp = fieldFromInstruction(insn, 16, 5);
25145 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25146 tmp = 0x0;
25147 tmp |= fieldFromInstruction(insn, 12, 1) << 0;
25148 tmp |= fieldFromInstruction(insn, 15, 1) << 1;
25149 if (!Check(S, DecodeMemExtend(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25152 tmp = fieldFromInstruction(insn, 0, 5);
25153 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25154 tmp = fieldFromInstruction(insn, 5, 5);
25155 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25156 tmp = fieldFromInstruction(insn, 16, 5);
25157 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25158 tmp = 0x0;
25159 tmp |= fieldFromInstruction(insn, 12, 1) << 0;
25160 tmp |= fieldFromInstruction(insn, 15, 1) << 1;
25161 if (!Check(S, DecodeMemExtend(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25164 tmp = fieldFromInstruction(insn, 0, 5);
25165 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25166 tmp = fieldFromInstruction(insn, 5, 5);
25167 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25168 tmp = fieldFromInstruction(insn, 16, 5);
25169 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25170 tmp = 0x0;
25171 tmp |= fieldFromInstruction(insn, 12, 1) << 0;
25172 tmp |= fieldFromInstruction(insn, 15, 1) << 1;
25173 if (!Check(S, DecodeMemExtend(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25176 tmp = fieldFromInstruction(insn, 0, 5);
25177 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25178 tmp = fieldFromInstruction(insn, 5, 19);
25179 if (!Check(S, DecodePCRelLabel19(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25182 tmp = fieldFromInstruction(insn, 0, 5);
25183 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25184 tmp = fieldFromInstruction(insn, 0, 5);
25185 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25186 tmp = fieldFromInstruction(insn, 5, 5);
25187 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25188 tmp = fieldFromInstruction(insn, 16, 5);
25189 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25192 tmp = fieldFromInstruction(insn, 0, 5);
25193 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25194 tmp = fieldFromInstruction(insn, 5, 5);
25195 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25196 tmp = fieldFromInstruction(insn, 20, 1);
25197 MI.addOperand(MCOperand::createImm(tmp));
25200 tmp = fieldFromInstruction(insn, 0, 5);
25201 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25202 tmp = fieldFromInstruction(insn, 5, 5);
25203 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25204 tmp = fieldFromInstruction(insn, 19, 2);
25205 MI.addOperand(MCOperand::createImm(tmp));
25208 tmp = fieldFromInstruction(insn, 0, 5);
25209 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25210 tmp = fieldFromInstruction(insn, 5, 5);
25211 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25212 tmp = fieldFromInstruction(insn, 18, 3);
25213 MI.addOperand(MCOperand::createImm(tmp));
25216 tmp = fieldFromInstruction(insn, 0, 5);
25217 if (!Check(S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25218 tmp = fieldFromInstruction(insn, 5, 5);
25219 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25220 tmp = fieldFromInstruction(insn, 17, 4);
25221 MI.addOperand(MCOperand::createImm(tmp));
25224 tmp = fieldFromInstruction(insn, 0, 5);
25225 if (!Check(S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25226 tmp = fieldFromInstruction(insn, 5, 5);
25227 if (!Check(S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25228 tmp = fieldFromInstruction(insn, 16, 5);
25229 if (!Check(S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25232 tmp = fieldFromInstruction(insn, 0, 5);
25233 if (!Check(S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25234 tmp = fieldFromInstruction(insn, 0, 5);
25235 if (!Check(S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25236 tmp = fieldFromInstruction(insn, 5, 5);
25237 if (!Check(S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25240 tmp = fieldFromInstruction(insn, 0, 5);
25241 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25242 tmp = fieldFromInstruction(insn, 0, 5);
25243 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25244 tmp = fieldFromInstruction(insn, 5, 5);
25245 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25248 tmp = fieldFromInstruction(insn, 0, 5);
25249 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25250 tmp = fieldFromInstruction(insn, 0, 5);
25251 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25252 tmp = fieldFromInstruction(insn, 5, 5);
25253 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25256 tmp = fieldFromInstruction(insn, 0, 5);
25257 if (!Check(S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25258 tmp = fieldFromInstruction(insn, 5, 5);
25259 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25262 tmp = fieldFromInstruction(insn, 0, 5);
25263 if (!Check(S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25264 tmp = fieldFromInstruction(insn, 5, 5);
25265 if (!Check(S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25268 tmp = fieldFromInstruction(insn, 0, 5);
25269 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25270 tmp = fieldFromInstruction(insn, 0, 5);
25271 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25272 tmp = fieldFromInstruction(insn, 5, 5);
25273 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25274 tmp = fieldFromInstruction(insn, 16, 5);
25275 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25278 tmp = fieldFromInstruction(insn, 0, 5);
25279 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25280 tmp = fieldFromInstruction(insn, 0, 5);
25281 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25282 tmp = fieldFromInstruction(insn, 5, 5);
25283 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25284 tmp = fieldFromInstruction(insn, 16, 5);
25285 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25288 tmp = fieldFromInstruction(insn, 0, 5);
25289 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25290 tmp = fieldFromInstruction(insn, 5, 5);
25291 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25292 tmp = fieldFromInstruction(insn, 16, 5);
25293 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25296 tmp = fieldFromInstruction(insn, 0, 5);
25297 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25298 tmp = fieldFromInstruction(insn, 5, 5);
25299 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25300 tmp = fieldFromInstruction(insn, 16, 5);
25301 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25304 tmp = fieldFromInstruction(insn, 0, 5);
25305 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25306 tmp = fieldFromInstruction(insn, 5, 5);
25307 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25308 tmp = fieldFromInstruction(insn, 16, 6);
25309 if (!Check(S, DecodeVecShiftR64Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25312 tmp = fieldFromInstruction(insn, 0, 5);
25313 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25314 tmp = fieldFromInstruction(insn, 0, 5);
25315 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25316 tmp = fieldFromInstruction(insn, 5, 5);
25317 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25318 tmp = fieldFromInstruction(insn, 16, 4);
25319 if (!Check(S, DecodeFPR128_loRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25320 tmp = 0x0;
25321 tmp |= fieldFromInstruction(insn, 11, 1) << 2;
25322 tmp |= fieldFromInstruction(insn, 20, 2) << 0;
25323 MI.addOperand(MCOperand::createImm(tmp));
25326 tmp = fieldFromInstruction(insn, 0, 5);
25327 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25328 tmp = fieldFromInstruction(insn, 0, 5);
25329 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25330 tmp = fieldFromInstruction(insn, 5, 5);
25331 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25332 tmp = fieldFromInstruction(insn, 16, 6);
25333 if (!Check(S, DecodeVecShiftR64Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25336 tmp = fieldFromInstruction(insn, 0, 5);
25337 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25338 tmp = fieldFromInstruction(insn, 0, 5);
25339 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25340 tmp = fieldFromInstruction(insn, 5, 5);
25341 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25342 tmp = fieldFromInstruction(insn, 16, 5);
25343 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25344 tmp = 0x0;
25345 tmp |= fieldFromInstruction(insn, 11, 1) << 1;
25346 tmp |= fieldFromInstruction(insn, 21, 1) << 0;
25347 MI.addOperand(MCOperand::createImm(tmp));
25350 tmp = fieldFromInstruction(insn, 0, 5);
25351 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25352 tmp = fieldFromInstruction(insn, 0, 5);
25353 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25354 tmp = fieldFromInstruction(insn, 5, 5);
25355 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25356 tmp = fieldFromInstruction(insn, 16, 5);
25357 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25358 tmp = fieldFromInstruction(insn, 11, 1);
25359 MI.addOperand(MCOperand::createImm(tmp));
25362 tmp = fieldFromInstruction(insn, 0, 5);
25363 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25364 tmp = fieldFromInstruction(insn, 0, 5);
25365 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25366 tmp = fieldFromInstruction(insn, 5, 5);
25367 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25368 tmp = fieldFromInstruction(insn, 16, 4);
25369 if (!Check(S, DecodeFPR128_loRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25370 tmp = 0x0;
25371 tmp |= fieldFromInstruction(insn, 11, 1) << 2;
25372 tmp |= fieldFromInstruction(insn, 20, 2) << 0;
25373 MI.addOperand(MCOperand::createImm(tmp));
25376 tmp = fieldFromInstruction(insn, 0, 5);
25377 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25378 tmp = fieldFromInstruction(insn, 0, 5);
25379 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25380 tmp = fieldFromInstruction(insn, 5, 5);
25381 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25382 tmp = fieldFromInstruction(insn, 16, 5);
25383 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25384 tmp = 0x0;
25385 tmp |= fieldFromInstruction(insn, 11, 1) << 1;
25386 tmp |= fieldFromInstruction(insn, 21, 1) << 0;
25387 MI.addOperand(MCOperand::createImm(tmp));
25390 tmp = fieldFromInstruction(insn, 0, 5);
25391 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25392 tmp = fieldFromInstruction(insn, 5, 5);
25393 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25394 tmp = fieldFromInstruction(insn, 16, 6);
25395 if (!Check(S, DecodeVecShiftL64Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25398 tmp = fieldFromInstruction(insn, 0, 5);
25399 if (!Check(S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25400 tmp = fieldFromInstruction(insn, 5, 5);
25401 if (!Check(S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25402 tmp = fieldFromInstruction(insn, 16, 3);
25403 if (!Check(S, DecodeVecShiftL8Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25406 tmp = fieldFromInstruction(insn, 0, 5);
25407 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25408 tmp = fieldFromInstruction(insn, 5, 5);
25409 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25410 tmp = fieldFromInstruction(insn, 16, 4);
25411 if (!Check(S, DecodeVecShiftL16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25414 tmp = fieldFromInstruction(insn, 0, 5);
25415 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25416 tmp = fieldFromInstruction(insn, 5, 5);
25417 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25418 tmp = fieldFromInstruction(insn, 16, 5);
25419 if (!Check(S, DecodeVecShiftL32Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25422 tmp = fieldFromInstruction(insn, 0, 5);
25423 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25424 tmp = fieldFromInstruction(insn, 5, 5);
25425 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25426 tmp = fieldFromInstruction(insn, 16, 4);
25427 if (!Check(S, DecodeFPR128_loRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25428 tmp = 0x0;
25429 tmp |= fieldFromInstruction(insn, 11, 1) << 2;
25430 tmp |= fieldFromInstruction(insn, 20, 2) << 0;
25431 MI.addOperand(MCOperand::createImm(tmp));
25434 tmp = fieldFromInstruction(insn, 0, 5);
25435 if (!Check(S, DecodeFPR8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25436 tmp = fieldFromInstruction(insn, 5, 5);
25437 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25438 tmp = fieldFromInstruction(insn, 16, 3);
25439 if (!Check(S, DecodeVecShiftR8Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25442 tmp = fieldFromInstruction(insn, 0, 5);
25443 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25444 tmp = fieldFromInstruction(insn, 5, 5);
25445 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25446 tmp = fieldFromInstruction(insn, 16, 4);
25447 if (!Check(S, DecodeVecShiftR16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25450 tmp = fieldFromInstruction(insn, 0, 5);
25451 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25452 tmp = fieldFromInstruction(insn, 5, 5);
25453 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25454 tmp = fieldFromInstruction(insn, 16, 5);
25455 if (!Check(S, DecodeVecShiftR32Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25458 tmp = fieldFromInstruction(insn, 0, 5);
25459 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25460 tmp = fieldFromInstruction(insn, 5, 5);
25461 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25462 tmp = fieldFromInstruction(insn, 16, 5);
25463 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25464 tmp = 0x0;
25465 tmp |= fieldFromInstruction(insn, 11, 1) << 1;
25466 tmp |= fieldFromInstruction(insn, 21, 1) << 0;
25467 MI.addOperand(MCOperand::createImm(tmp));
25470 tmp = fieldFromInstruction(insn, 0, 5);
25471 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25472 tmp = fieldFromInstruction(insn, 5, 5);
25473 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25474 tmp = fieldFromInstruction(insn, 16, 5);
25475 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25476 tmp = fieldFromInstruction(insn, 11, 1);
25477 MI.addOperand(MCOperand::createImm(tmp));
25480 tmp = fieldFromInstruction(insn, 0, 5);
25481 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25482 tmp = fieldFromInstruction(insn, 5, 5);
25483 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25484 tmp = fieldFromInstruction(insn, 16, 4);
25485 if (!Check(S, DecodeFPR128_loRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25486 tmp = 0x0;
25487 tmp |= fieldFromInstruction(insn, 11, 1) << 2;
25488 tmp |= fieldFromInstruction(insn, 20, 2) << 0;
25489 MI.addOperand(MCOperand::createImm(tmp));
25492 tmp = fieldFromInstruction(insn, 0, 5);
25493 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25494 tmp = fieldFromInstruction(insn, 5, 5);
25495 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25496 tmp = fieldFromInstruction(insn, 16, 5);
25497 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25498 tmp = 0x0;
25499 tmp |= fieldFromInstruction(insn, 11, 1) << 1;
25500 tmp |= fieldFromInstruction(insn, 21, 1) << 0;
25501 MI.addOperand(MCOperand::createImm(tmp));
25504 tmp = fieldFromInstruction(insn, 0, 5);
25505 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25506 tmp = fieldFromInstruction(insn, 5, 5);
25507 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25508 tmp = fieldFromInstruction(insn, 16, 4);
25509 if (!Check(S, DecodeVecShiftR16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25512 tmp = fieldFromInstruction(insn, 0, 5);
25513 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25514 tmp = fieldFromInstruction(insn, 5, 5);
25515 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25516 tmp = fieldFromInstruction(insn, 16, 5);
25517 if (!Check(S, DecodeVecShiftR32Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25520 tmp = fieldFromInstruction(insn, 0, 5);
25521 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25522 tmp = fieldFromInstruction(insn, 5, 5);
25523 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25524 tmp = fieldFromInstruction(insn, 16, 5);
25525 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25526 tmp = 0x0;
25527 tmp |= fieldFromInstruction(insn, 12, 1) << 0;
25528 tmp |= fieldFromInstruction(insn, 15, 1) << 1;
25529 if (!Check(S, DecodeMemExtend(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25532 tmp = fieldFromInstruction(insn, 0, 5);
25533 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25534 tmp = fieldFromInstruction(insn, 5, 5);
25535 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25536 tmp = fieldFromInstruction(insn, 16, 5);
25537 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25538 tmp = 0x0;
25539 tmp |= fieldFromInstruction(insn, 12, 1) << 0;
25540 tmp |= fieldFromInstruction(insn, 15, 1) << 1;
25541 if (!Check(S, DecodeMemExtend(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25544 tmp = fieldFromInstruction(insn, 0, 5);
25545 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25546 tmp = fieldFromInstruction(insn, 0, 5);
25547 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25548 tmp = fieldFromInstruction(insn, 5, 5);
25549 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25550 tmp = fieldFromInstruction(insn, 16, 5);
25551 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25554 tmp = fieldFromInstruction(insn, 0, 5);
25555 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25556 tmp = fieldFromInstruction(insn, 0, 5);
25557 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25558 tmp = fieldFromInstruction(insn, 5, 5);
25559 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25560 tmp = fieldFromInstruction(insn, 16, 5);
25561 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25564 tmp = fieldFromInstruction(insn, 0, 5);
25565 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25566 tmp = fieldFromInstruction(insn, 0, 5);
25567 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25568 tmp = fieldFromInstruction(insn, 5, 5);
25569 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25570 tmp = fieldFromInstruction(insn, 16, 6);
25571 if (!Check(S, DecodeVecShiftL64Imm(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25574 tmp = fieldFromInstruction(insn, 0, 5);
25575 if (!Check(S, DecodeFPR128RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25576 tmp = fieldFromInstruction(insn, 5, 19);
25577 if (!Check(S, DecodePCRelLabel19(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25580 tmp = fieldFromInstruction(insn, 0, 5);
25581 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25582 tmp = fieldFromInstruction(insn, 5, 5);
25583 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25584 tmp = fieldFromInstruction(insn, 10, 6);
25585 if (!Check(S, DecodeFixedPointScaleImm64(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25588 tmp = fieldFromInstruction(insn, 0, 5);
25589 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25590 tmp = fieldFromInstruction(insn, 5, 5);
25591 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25592 tmp = fieldFromInstruction(insn, 10, 6);
25593 if (!Check(S, DecodeFixedPointScaleImm64(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25596 tmp = fieldFromInstruction(insn, 0, 5);
25597 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25598 tmp = fieldFromInstruction(insn, 5, 5);
25599 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25602 tmp = fieldFromInstruction(insn, 0, 5);
25603 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25604 tmp = fieldFromInstruction(insn, 5, 5);
25605 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25608 tmp = fieldFromInstruction(insn, 0, 5);
25609 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25610 tmp = fieldFromInstruction(insn, 5, 5);
25611 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25612 tmp = fieldFromInstruction(insn, 10, 6);
25613 if (!Check(S, DecodeFixedPointScaleImm64(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25616 tmp = fieldFromInstruction(insn, 0, 5);
25617 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25618 tmp = fieldFromInstruction(insn, 5, 5);
25619 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25620 tmp = fieldFromInstruction(insn, 10, 6);
25621 if (!Check(S, DecodeFixedPointScaleImm64(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25624 tmp = fieldFromInstruction(insn, 0, 5);
25625 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25626 tmp = fieldFromInstruction(insn, 5, 5);
25627 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25630 tmp = fieldFromInstruction(insn, 0, 5);
25631 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25632 tmp = fieldFromInstruction(insn, 5, 5);
25633 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25639 tmp = fieldFromInstruction(insn, 0, 5);
25640 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25641 tmp = fieldFromInstruction(insn, 5, 5);
25642 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25643 tmp = fieldFromInstruction(insn, 10, 6);
25644 if (!Check(S, DecodeFixedPointScaleImm64(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25647 tmp = fieldFromInstruction(insn, 0, 5);
25648 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25649 tmp = fieldFromInstruction(insn, 5, 5);
25650 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25651 tmp = fieldFromInstruction(insn, 10, 6);
25652 if (!Check(S, DecodeFixedPointScaleImm64(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25655 tmp = fieldFromInstruction(insn, 0, 5);
25656 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25657 tmp = fieldFromInstruction(insn, 5, 5);
25658 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25661 tmp = fieldFromInstruction(insn, 0, 5);
25662 if (!Check(S, DecodeFPR16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25663 tmp = fieldFromInstruction(insn, 5, 5);
25664 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25667 tmp = fieldFromInstruction(insn, 0, 5);
25668 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25669 tmp = fieldFromInstruction(insn, 5, 5);
25670 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25671 tmp = fieldFromInstruction(insn, 16, 5);
25672 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25673 tmp = 0x0;
25674 tmp |= fieldFromInstruction(insn, 12, 1) << 0;
25675 tmp |= fieldFromInstruction(insn, 15, 1) << 1;
25676 if (!Check(S, DecodeMemExtend(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25679 tmp = fieldFromInstruction(insn, 0, 5);
25680 if (!Check(S, DecodeFPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25681 tmp = fieldFromInstruction(insn, 5, 5);
25682 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25683 tmp = fieldFromInstruction(insn, 16, 5);
25684 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25685 tmp = 0x0;
25686 tmp |= fieldFromInstruction(insn, 12, 1) << 0;
25687 tmp |= fieldFromInstruction(insn, 15, 1) << 1;
25688 if (!Check(S, DecodeMemExtend(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25691 tmp = fieldFromInstruction(insn, 0, 5);
25692 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25693 tmp = fieldFromInstruction(insn, 5, 5);
25694 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25695 tmp = fieldFromInstruction(insn, 16, 5);
25696 if (!Check(S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25697 tmp = 0x0;
25698 tmp |= fieldFromInstruction(insn, 12, 1) << 0;
25699 tmp |= fieldFromInstruction(insn, 15, 1) << 1;
25700 if (!Check(S, DecodeMemExtend(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25703 tmp = fieldFromInstruction(insn, 0, 5);
25704 if (!Check(S, DecodeFPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25705 tmp = fieldFromInstruction(insn, 5, 5);
25706 if (!Check(S, DecodeGPR64spRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25707 tmp = fieldFromInstruction(insn, 16, 5);
25708 if (!Check(S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }
25709 tmp = 0x0;
25710 tmp |= fieldFromInstruction(insn, 12, 1) << 0;
25711 tmp |= fieldFromInstruction(insn, 15, 1) << 1;
25712 if (!Check(S, DecodeMemExtend(MI, tmp, Address, Decoder))) { return MCDisassembler::Fail; }