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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc12766 { 72 /* adds */, AArch64::ADDSWrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, },
12773 { 72 /* adds */, AArch64::ADDSWrs, Convert__Reg1_0__Reg1_1__Reg1_2__ArithmeticShifter321_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_ArithmeticShifter32 }, },
13204 { 661 /* cmn */, AArch64::ADDSWrs, Convert__regWZR__Reg1_0__Reg1_1__imm_95_0, AMFBS_None, { MCK_GPR32, MCK_GPR32 }, },
13210 { 661 /* cmn */, AArch64::ADDSWrs, Convert__regWZR__Reg1_0__Reg1_1__ArithmeticShifter321_2, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_ArithmeticShifter32 }, },
20124 { 72 /* adds */, AArch64::ADDSWrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, },
20131 { 72 /* adds */, AArch64::ADDSWrs, Convert__Reg1_0__Reg1_1__Reg1_2__ArithmeticShifter321_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_ArithmeticShifter32 }, },
20562 { 661 /* cmn */, AArch64::ADDSWrs, Convert__regWZR__Reg1_0__Reg1_1__imm_95_0, AMFBS_None, { MCK_GPR32, MCK_GPR32 }, },
20568 { 661 /* cmn */, AArch64::ADDSWrs, Convert__regWZR__Reg1_0__Reg1_1__ArithmeticShifter321_2, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_ArithmeticShifter32 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc14815 case AArch64::ADDSWrs:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc15531 case AArch64::ADDSWrs:
gen/lib/Target/AArch64/AArch64GenDAGISel.inc93433 /*212584*/ OPC_MorphNodeTo2, TARGET_VAL(AArch64::ADDSWrs), 0,
93445 /*212612*/ OPC_MorphNodeTo2, TARGET_VAL(AArch64::ADDSWrs), 0,
gen/lib/Target/AArch64/AArch64GenInstrInfo.inc18033 case AArch64::ADDSWrs:
18372 case AArch64::ADDSWrs:
29771 case AArch64::ADDSWrs:
30110 case AArch64::ADDSWrs:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc15454 case AArch64::ADDSWrs:
lib/Target/AArch64/AArch64CondBrTuning.cpp 171 case AArch64::ADDSWrs:
lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp 444 case AArch64::ADDSWrr: Opcode = AArch64::ADDSWrs; break;
lib/Target/AArch64/AArch64FastISel.cpp 1418 { AArch64::ADDSWrs, AArch64::ADDSXrs } }
lib/Target/AArch64/AArch64InstrInfo.cpp 770 case AArch64::ADDSWrs:
1005 case AArch64::ADDSWrs:
1102 case AArch64::ADDSWrs:
1103 return MIDefinesZeroReg ? AArch64::ADDSWrs : AArch64::ADDWrs;
1851 return AArch64::ADDSWrs;
lib/Target/AArch64/AArch64MacroFusion.cpp 48 case AArch64::ADDSWrs:
330 case AArch64::ADDSWrs:
345 case AArch64::ADDSWrs:
lib/Target/AArch64/AArch64RedundantCopyElimination.cpp 227 case AArch64::ADDSWrs:
lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp 947 case AArch64::ADDSWrs: