|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc12825 { 120 /* and */, AArch64::ANDv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, AMFBS_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, },
20180 { 120 /* and */, AArch64::ANDv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, AMFBS_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, },
gen/lib/Target/AArch64/AArch64GenDAGISel.inc86136 /*198991*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::ANDv16i8), 0,
86160 /*199039*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::ANDv16i8), 0,
86166 /*199051*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::ANDv16i8), 0,
86172 /*199063*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::ANDv16i8), 0,
gen/lib/Target/AArch64/AArch64GenFastISel.inc 6081 return fastEmitInst_rr(AArch64::ANDv16i8, &AArch64::FPR128RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
6099 return fastEmitInst_rr(AArch64::ANDv16i8, &AArch64::FPR128RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
6117 return fastEmitInst_rr(AArch64::ANDv16i8, &AArch64::FPR128RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
6135 return fastEmitInst_rr(AArch64::ANDv16i8, &AArch64::FPR128RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/AArch64/AArch64GenGlobalISel.inc 6113 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDv16i8,
6143 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDv16i8,
6173 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDv16i8,
6188 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDv16i8,
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc 8401 case AArch64::ANDv16i8: