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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc12826 { 120 /* and */, AArch64::ANDv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, AMFBS_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, },
20181 { 120 /* and */, AArch64::ANDv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, AMFBS_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, },
gen/lib/Target/AArch64/AArch64GenDAGISel.inc86130 /*198979*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::ANDv8i8), 0,
86142 /*199003*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::ANDv8i8), 0,
86148 /*199015*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::ANDv8i8), 0,
86154 /*199027*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::ANDv8i8), 0,
gen/lib/Target/AArch64/AArch64GenFastISel.inc 6072 return fastEmitInst_rr(AArch64::ANDv8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
6090 return fastEmitInst_rr(AArch64::ANDv8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
6108 return fastEmitInst_rr(AArch64::ANDv8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
6126 return fastEmitInst_rr(AArch64::ANDv8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/AArch64/AArch64GenGlobalISel.inc 6081 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDv8i8,
6098 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDv8i8,
6128 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDv8i8,
6158 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDv8i8,
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc 8402 case AArch64::ANDv8i8:
lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp 174 return AArch64::ANDv8i8;