|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc13403 { 856 /* csel */, AArch64::CSELXr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_CondCode }, },
20761 { 856 /* csel */, AArch64::CSELXr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_CondCode }, },
gen/lib/Target/AArch64/AArch64GenDAGISel.inc93244 /*212135*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::CSELXr), 0|OPFL_GlueInput,
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc 9089 case AArch64::CSELXr:
lib/Target/AArch64/AArch64FastISel.cpp 2728 Opc = AArch64::CSELXr;
4958 SelectOpc = AArch64::CSELXr;
lib/Target/AArch64/AArch64InstrInfo.cpp 627 Opc = AArch64::CSELXr;
1320 case AArch64::CSELXr:
lib/Target/AArch64/AArch64InstructionSelector.cpp 840 return IsFP ? AArch64::FCSELDrrr : AArch64::CSELXr;
lib/Target/AArch64/AArch64MacroFusion.cpp 251 if (SecondMI.getOpcode() == AArch64::CSELXr) {
lib/Target/AArch64/AArch64SpeculationHardening.cpp 231 BuildMI(SplitEdgeBB, SplitEdgeBB.begin(), DL, TII->get(AArch64::CSELXr))