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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc13033 { 578 /* cinv */, AArch64::CSINVXr, Convert__Reg1_0__Reg1_1__Reg1_1__CondCode1_2, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_CondCode }, },
13407 { 866 /* csetm */, AArch64::CSINVXr, Convert__Reg1_0__regXZR__regXZR__CondCode1_1, AMFBS_None, { MCK_GPR64, MCK_CondCode }, },
13411 { 878 /* csinv */, AArch64::CSINVXr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_CondCode }, },
20391 { 578 /* cinv */, AArch64::CSINVXr, Convert__Reg1_0__Reg1_1__Reg1_1__CondCode1_2, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_CondCode }, },
20765 { 866 /* csetm */, AArch64::CSINVXr, Convert__Reg1_0__regXZR__regXZR__CondCode1_1, AMFBS_None, { MCK_GPR64, MCK_CondCode }, },
20769 { 878 /* csinv */, AArch64::CSINVXr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_CondCode }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc15757 case AArch64::CSINVXr:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc16473 case AArch64::CSINVXr:
gen/lib/Target/AArch64/AArch64GenDAGISel.inc92937 /*211492*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::CSINVXr), 0|OPFL_GlueInput,
93024 /*211667*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::CSINVXr), 0|OPFL_GlueInput,
93054 /*211735*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::CSINVXr), 0|OPFL_GlueInput,
93192 /*212021*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::CSINVXr), 0|OPFL_GlueInput,
93220 /*212089*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::CSINVXr), 0|OPFL_GlueInput,
96114 /*217677*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::CSINVXr), 0|OPFL_GlueInput,
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc 9093 case AArch64::CSINVXr:
lib/Target/AArch64/AArch64InstrInfo.cpp 465 Opc = Is64Bit ? AArch64::CSINVXr : AArch64::CSINVWr;
1316 case AArch64::CSINVXr:
lib/Target/AArch64/AArch64SpeculationHardening.cpp 375 BuildMI(MBB, MBBI, DebugLoc(), TII->get(AArch64::CSINVXr))