reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc

13484   { 962 /* dup */, AArch64::DUPv4i32lane, Convert__VectorReg1281_0__VectorReg1281_2__IndexRange0_31_4, AMFBS_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_IndexRange0_3 }, },
20844   { 962 /* dup */, AArch64::DUPv4i32lane, Convert__VectorReg1281_1__VectorReg1281_2__IndexRange0_31_3, AMFBS_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_IndexRange0_3 }, },

gen/lib/Target/AArch64/AArch64GenDAGISel.inc

110291 /*246406*/            OPC_MorphNodeTo1, TARGET_VAL(AArch64::DUPv4i32lane), 0,
110366 /*246600*/            OPC_MorphNodeTo1, TARGET_VAL(AArch64::DUPv4i32lane), 0,
110774 /*247422*/          OPC_MorphNodeTo1, TARGET_VAL(AArch64::DUPv4i32lane), 0,
111483 /*248953*/        OPC_MorphNodeTo1, TARGET_VAL(AArch64::DUPv4i32lane), 0,
111504 /*248992*/        OPC_MorphNodeTo1, TARGET_VAL(AArch64::DUPv4i32lane), 0,

gen/lib/Target/AArch64/AArch64GenFastISel.inc

 7822     return fastEmitInst_ri(AArch64::DUPv4i32lane, &AArch64::FPR128RegClass, Op0, Op0IsKill, imm1);
 7840   return fastEmitInst_ri(AArch64::DUPv4i32lane, &AArch64::FPR128RegClass, Op0, Op0IsKill, imm1);

gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc

 9412     case AArch64::DUPv4i32lane:

lib/Target/AArch64/AArch64InstructionSelector.cpp

 3620       {AArch64::DUPv4i32lane, AArch64::DUPv2i64lane}};

lib/Target/AArch64/AArch64SIMDInstrOpt.cpp

  283     ReplInstrMCID.push_back(&TII->get(AArch64::DUPv4i32lane));
  360     DupMCID = &TII->get(AArch64::DUPv4i32lane);
  364     DupMCID = &TII->get(AArch64::DUPv4i32lane);
  368     DupMCID = &TII->get(AArch64::DUPv4i32lane);
  372     DupMCID = &TII->get(AArch64::DUPv4i32lane);