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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc14992 { 1868 /* ld1h */, AArch64::GLD1H_D_IMM_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__imm_95_0, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorDReg, MCK__93_ }, },
14997 { 1868 /* ld1h */, AArch64::GLD1H_D_IMM_REAL, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__imm_95_0, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorDReg, MCK__93_ }, },
15012 { 1868 /* ld1h */, AArch64::GLD1H_D_IMM_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__UImm5s21_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorDReg, MCK_UImm5s2, MCK__93_ }, },
15027 { 1868 /* ld1h */, AArch64::GLD1H_D_IMM_REAL, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__UImm5s21_6, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorDReg, MCK_UImm5s2, MCK__93_ }, },
22350 { 1868 /* ld1h */, AArch64::GLD1H_D_IMM_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__imm_95_0, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorDReg, MCK__93_ }, },
22355 { 1868 /* ld1h */, AArch64::GLD1H_D_IMM_REAL, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__imm_95_0, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorDReg, MCK__93_ }, },
22370 { 1868 /* ld1h */, AArch64::GLD1H_D_IMM_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__UImm5s21_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorDReg, MCK_UImm5s2, MCK__93_ }, },
22385 { 1868 /* ld1h */, AArch64::GLD1H_D_IMM_REAL, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__UImm5s21_6, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_SVEVectorDReg, MCK_UImm5s2, MCK__93_ }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc16581 case AArch64::GLD1H_D_IMM_REAL:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc17297 case AArch64::GLD1H_D_IMM_REAL:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc 7320 case AArch64::GLD1H_D_IMM_REAL: