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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc15056 { 1873 /* ld1r */, AArch64::LD1Rv2s_POST, Convert__Reg1_2__TypedVectorList1_2321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList1_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_4 }, },
15057 { 1873 /* ld1r */, AArch64::LD1Rv2s_POST, Convert__Reg1_2__TypedVectorList1_2321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList1_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
15072 { 1873 /* ld1r */, AArch64::LD1Rv2s_POST, Convert__Reg1_3__VecListOne641_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_2s, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_4 }, },
15073 { 1873 /* ld1r */, AArch64::LD1Rv2s_POST, Convert__Reg1_3__VecListOne641_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_2s, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22414 { 1873 /* ld1r */, AArch64::LD1Rv2s_POST, Convert__Reg1_2__TypedVectorList1_2321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList1_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_4 }, },
22415 { 1873 /* ld1r */, AArch64::LD1Rv2s_POST, Convert__Reg1_2__TypedVectorList1_2321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList1_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22430 { 1873 /* ld1r */, AArch64::LD1Rv2s_POST, Convert__Reg1_3__VecListOne641_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_2s, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_4 }, },
22431 { 1873 /* ld1r */, AArch64::LD1Rv2s_POST, Convert__Reg1_3__VecListOne641_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_2s, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc17979 case AArch64::LD1Rv2s_POST:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc18695 case AArch64::LD1Rv2s_POST:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc12721 case AArch64::LD1Rv2s_POST:
lib/Target/AArch64/AArch64FalkorHWPFFix.cpp 408 case AArch64::LD1Rv2s_POST:
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp 3777 SelectPostLoad(Node, 1, AArch64::LD1Rv2s_POST, AArch64::dsub0);
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp 372 { AArch64::LD1Rv2s_POST, "ld1r", ".2s", 1, false, 4 },