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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc15060 { 1873 /* ld1r */, AArch64::LD1Rv4s_POST, Convert__Reg1_2__TypedVectorList1_4321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList1_432, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_4 }, },
15061 { 1873 /* ld1r */, AArch64::LD1Rv4s_POST, Convert__Reg1_2__TypedVectorList1_4321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList1_432, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
15076 { 1873 /* ld1r */, AArch64::LD1Rv4s_POST, Convert__Reg1_3__VecListOne1281_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_4s, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_4 }, },
15077 { 1873 /* ld1r */, AArch64::LD1Rv4s_POST, Convert__Reg1_3__VecListOne1281_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_4s, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22418 { 1873 /* ld1r */, AArch64::LD1Rv4s_POST, Convert__Reg1_2__TypedVectorList1_4321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList1_432, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_4 }, },
22419 { 1873 /* ld1r */, AArch64::LD1Rv4s_POST, Convert__Reg1_2__TypedVectorList1_4321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList1_432, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22434 { 1873 /* ld1r */, AArch64::LD1Rv4s_POST, Convert__Reg1_3__VecListOne1281_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_4s, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_4 }, },
22435 { 1873 /* ld1r */, AArch64::LD1Rv4s_POST, Convert__Reg1_3__VecListOne1281_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_4s, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc18005 case AArch64::LD1Rv4s_POST:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc18721 case AArch64::LD1Rv4s_POST:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc12723 case AArch64::LD1Rv4s_POST:
lib/Target/AArch64/AArch64FalkorHWPFFix.cpp 412 case AArch64::LD1Rv4s_POST:
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp 3780 SelectPostLoad(Node, 1, AArch64::LD1Rv4s_POST, AArch64::qsub0);
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp 368 { AArch64::LD1Rv4s_POST, "ld1r", ".4s", 1, false, 4 },