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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc15173 { 1951 /* ld1sb */, AArch64::LD1SB_D_IMM, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__imm_95_0, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
15178 { 1951 /* ld1sb */, AArch64::LD1SB_D_IMM, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__Reg1_5__imm_95_0, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
15202 { 1951 /* ld1sb */, AArch64::LD1SB_D_IMM, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s11_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s1, MCK_mul, MCK_vl, MCK__93_ }, },
15205 { 1951 /* ld1sb */, AArch64::LD1SB_D_IMM, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s11_6, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s1, MCK_mul, MCK_vl, MCK__93_ }, },
22531 { 1951 /* ld1sb */, AArch64::LD1SB_D_IMM, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__imm_95_0, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
22536 { 1951 /* ld1sb */, AArch64::LD1SB_D_IMM, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__Reg1_5__imm_95_0, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
22560 { 1951 /* ld1sb */, AArch64::LD1SB_D_IMM, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s11_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s1, MCK_mul, MCK_vl, MCK__93_ }, },
22563 { 1951 /* ld1sb */, AArch64::LD1SB_D_IMM, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s11_6, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s1, MCK_mul, MCK_vl, MCK__93_ }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc18044 case AArch64::LD1SB_D_IMM:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc18760 case AArch64::LD1SB_D_IMM:
gen/lib/Target/AArch64/AArch64GenDAGISel.inc111632 /*249235*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::LD1SB_D_IMM), 0|OPFL_Chain|OPFL_MemRefs,
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc 6441 case AArch64::LD1SB_D_IMM: