reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc
14826   { 1854 /* ld1 */, AArch64::LD1Twov1d_POST, Convert__Reg1_2__TypedVectorList2_1641_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList2_164, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, },
14827   { 1854 /* ld1 */, AArch64::LD1Twov1d_POST, Convert__Reg1_2__TypedVectorList2_1641_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList2_164, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
14854   { 1854 /* ld1 */, AArch64::LD1Twov1d_POST, Convert__Reg1_3__VecListTwo641_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_1d, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, },
14855   { 1854 /* ld1 */, AArch64::LD1Twov1d_POST, Convert__Reg1_3__VecListTwo641_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_1d, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22184   { 1854 /* ld1 */, AArch64::LD1Twov1d_POST, Convert__Reg1_2__TypedVectorList2_1641_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList2_164, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, },
22185   { 1854 /* ld1 */, AArch64::LD1Twov1d_POST, Convert__Reg1_2__TypedVectorList2_1641_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList2_164, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22212   { 1854 /* ld1 */, AArch64::LD1Twov1d_POST, Convert__Reg1_3__VecListTwo641_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_1d, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, },
22213   { 1854 /* ld1 */, AArch64::LD1Twov1d_POST, Convert__Reg1_3__VecListTwo641_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_1d, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc
18257   case AArch64::LD1Twov1d_POST:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc
18973   case AArch64::LD1Twov1d_POST:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc
12735     case AArch64::LD1Twov1d_POST:
lib/Target/AArch64/AArch64FalkorHWPFFix.cpp
  421   case AArch64::LD1Twov1d_POST:
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
 3615       SelectPostLoad(Node, 2, AArch64::LD1Twov1d_POST, AArch64::dsub0);
 3699       SelectPostLoad(Node, 2, AArch64::LD1Twov1d_POST, AArch64::dsub0);
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
  405   { AArch64::LD1Twov1d_POST,    "ld1",  ".1d",    1, false, 16 },