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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc14908 { 1854 /* ld1 */, AArch64::LD1i8_POST, Convert__Reg1_3__TypedVectorList1_081_0__Tie1_1_1__IndexRange0_151_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList1_08, MCK_IndexRange0_15, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_1 }, },
14909 { 1854 /* ld1 */, AArch64::LD1i8_POST, Convert__Reg1_3__TypedVectorList1_081_0__Tie1_1_1__IndexRange0_151_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK_TypedVectorList1_08, MCK_IndexRange0_15, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
14916 { 1854 /* ld1 */, AArch64::LD1i8_POST, Convert__Reg1_4__VecListOne1281_1__Tie1_2_2__IndexRange0_151_2__Tie0_5_5__regXZR, AMFBS_HasNEON, { MCK__DOT_b, MCK_VecListOne128, MCK_IndexRange0_15, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_1 }, },
14917 { 1854 /* ld1 */, AArch64::LD1i8_POST, Convert__Reg1_4__VecListOne1281_1__Tie1_2_2__IndexRange0_151_2__Tie0_5_5__Reg1_6, AMFBS_HasNEON, { MCK__DOT_b, MCK_VecListOne128, MCK_IndexRange0_15, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22266 { 1854 /* ld1 */, AArch64::LD1i8_POST, Convert__Reg1_3__TypedVectorList1_081_0__Tie1_1_1__IndexRange0_151_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList1_08, MCK_IndexRange0_15, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_1 }, },
22267 { 1854 /* ld1 */, AArch64::LD1i8_POST, Convert__Reg1_3__TypedVectorList1_081_0__Tie1_1_1__IndexRange0_151_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK_TypedVectorList1_08, MCK_IndexRange0_15, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22274 { 1854 /* ld1 */, AArch64::LD1i8_POST, Convert__Reg1_4__VecListOne1281_1__Tie1_2_2__IndexRange0_151_2__Tie0_5_5__regXZR, AMFBS_HasNEON, { MCK__DOT_b, MCK_VecListOne128, MCK_IndexRange0_15, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_1 }, },
22275 { 1854 /* ld1 */, AArch64::LD1i8_POST, Convert__Reg1_4__VecListOne1281_1__Tie1_2_2__IndexRange0_151_2__Tie0_5_5__Reg1_6, AMFBS_HasNEON, { MCK__DOT_b, MCK_VecListOne128, MCK_IndexRange0_15, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc18419 case AArch64::LD1i8_POST:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc19135 case AArch64::LD1i8_POST:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc13078 case AArch64::LD1i8_POST:
lib/Target/AArch64/AArch64FalkorHWPFFix.cpp 379 case AArch64::LD1i8_POST:
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp 3877 SelectPostLoadLane(Node, 1, AArch64::LD1i8_POST);
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp 354 { AArch64::LD1i8_POST, "ld1", ".b", 2, true, 1 },