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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc15360 { 1974 /* ld2 */, AArch64::LD2i64_POST, Convert__Reg1_3__TypedVectorList2_0641_0__Tie1_1_1__IndexRange0_11_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList2_064, MCK_IndexRange0_1, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, },
15361 { 1974 /* ld2 */, AArch64::LD2i64_POST, Convert__Reg1_3__TypedVectorList2_0641_0__Tie1_1_1__IndexRange0_11_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK_TypedVectorList2_064, MCK_IndexRange0_1, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
15368 { 1974 /* ld2 */, AArch64::LD2i64_POST, Convert__Reg1_4__VecListTwo1281_1__Tie1_2_2__IndexRange0_11_2__Tie0_5_5__regXZR, AMFBS_HasNEON, { MCK__DOT_d, MCK_VecListTwo128, MCK_IndexRange0_1, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, },
15369 { 1974 /* ld2 */, AArch64::LD2i64_POST, Convert__Reg1_4__VecListTwo1281_1__Tie1_2_2__IndexRange0_11_2__Tie0_5_5__Reg1_6, AMFBS_HasNEON, { MCK__DOT_d, MCK_VecListTwo128, MCK_IndexRange0_1, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22718 { 1974 /* ld2 */, AArch64::LD2i64_POST, Convert__Reg1_3__TypedVectorList2_0641_0__Tie1_1_1__IndexRange0_11_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList2_064, MCK_IndexRange0_1, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, },
22719 { 1974 /* ld2 */, AArch64::LD2i64_POST, Convert__Reg1_3__TypedVectorList2_0641_0__Tie1_1_1__IndexRange0_11_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK_TypedVectorList2_064, MCK_IndexRange0_1, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22726 { 1974 /* ld2 */, AArch64::LD2i64_POST, Convert__Reg1_4__VecListTwo1281_1__Tie1_2_2__IndexRange0_11_2__Tie0_5_5__regXZR, AMFBS_HasNEON, { MCK__DOT_d, MCK_VecListTwo128, MCK_IndexRange0_1, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, },
22727 { 1974 /* ld2 */, AArch64::LD2i64_POST, Convert__Reg1_4__VecListTwo1281_1__Tie1_2_2__IndexRange0_11_2__Tie0_5_5__Reg1_6, AMFBS_HasNEON, { MCK__DOT_d, MCK_VecListTwo128, MCK_IndexRange0_1, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc18717 case AArch64::LD2i64_POST:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc19433 case AArch64::LD2i64_POST:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc13103 case AArch64::LD2i64_POST:
lib/Target/AArch64/AArch64FalkorHWPFFix.cpp 372 case AArch64::LD2i64_POST:
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp 3908 SelectPostLoadLane(Node, 2, AArch64::LD2i64_POST);
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp 445 { AArch64::LD2i64_POST, "ld2", ".d", 2, true, 16 },