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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc15582 { 2032 /* ld4 */, AArch64::LD4Fourv4s_POST, Convert__Reg1_2__TypedVectorList4_4321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList4_432, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_64 }, },
15583 { 2032 /* ld4 */, AArch64::LD4Fourv4s_POST, Convert__Reg1_2__TypedVectorList4_4321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList4_432, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
15600 { 2032 /* ld4 */, AArch64::LD4Fourv4s_POST, Convert__Reg1_3__VecListFour1281_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_64 }, },
15601 { 2032 /* ld4 */, AArch64::LD4Fourv4s_POST, Convert__Reg1_3__VecListFour1281_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22940 { 2032 /* ld4 */, AArch64::LD4Fourv4s_POST, Convert__Reg1_2__TypedVectorList4_4321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList4_432, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_64 }, },
22941 { 2032 /* ld4 */, AArch64::LD4Fourv4s_POST, Convert__Reg1_2__TypedVectorList4_4321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList4_432, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22958 { 2032 /* ld4 */, AArch64::LD4Fourv4s_POST, Convert__Reg1_3__VecListFour1281_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_64 }, },
22959 { 2032 /* ld4 */, AArch64::LD4Fourv4s_POST, Convert__Reg1_3__VecListFour1281_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc19138 case AArch64::LD4Fourv4s_POST:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc19854 case AArch64::LD4Fourv4s_POST:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc12776 case AArch64::LD4Fourv4s_POST:
lib/Target/AArch64/AArch64FalkorHWPFFix.cpp 479 case AArch64::LD4Fourv4s_POST:
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp 3668 SelectPostLoad(Node, 4, AArch64::LD4Fourv4s_POST, AArch64::qsub0);
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp 547 { AArch64::LD4Fourv4s_POST, "ld4", ".4s", 1, false, 64 },