reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc
15665   { 2051 /* ld4r */, AArch64::LD4Rv8h_POST, Convert__Reg1_2__TypedVectorList4_8161_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList4_816, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_8 }, },
15666   { 2051 /* ld4r */, AArch64::LD4Rv8h_POST, Convert__Reg1_2__TypedVectorList4_8161_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList4_816, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
15681   { 2051 /* ld4r */, AArch64::LD4Rv8h_POST, Convert__Reg1_3__VecListFour1281_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_8 }, },
15682   { 2051 /* ld4r */, AArch64::LD4Rv8h_POST, Convert__Reg1_3__VecListFour1281_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
23023   { 2051 /* ld4r */, AArch64::LD4Rv8h_POST, Convert__Reg1_2__TypedVectorList4_8161_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList4_816, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_8 }, },
23024   { 2051 /* ld4r */, AArch64::LD4Rv8h_POST, Convert__Reg1_2__TypedVectorList4_8161_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList4_816, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
23039   { 2051 /* ld4r */, AArch64::LD4Rv8h_POST, Convert__Reg1_3__VecListFour1281_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_8 }, },
23040   { 2051 /* ld4r */, AArch64::LD4Rv8h_POST, Convert__Reg1_3__VecListFour1281_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc
19284   case AArch64::LD4Rv8h_POST:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc
20000   case AArch64::LD4Rv8h_POST:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc
12786     case AArch64::LD4Rv8h_POST:
lib/Target/AArch64/AArch64FalkorHWPFFix.cpp
  488   case AArch64::LD4Rv8h_POST:
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
 3858       SelectPostLoad(Node, 4, AArch64::LD4Rv8h_POST, AArch64::qsub0);
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
  531   { AArch64::LD4Rv8h_POST,      "ld4r", ".8h",    1, false, 8  },