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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc15614 { 2032 /* ld4 */, AArch64::LD4i16_POST, Convert__Reg1_3__TypedVectorList4_0161_0__Tie1_1_1__IndexRange0_71_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList4_016, MCK_IndexRange0_7, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_8 }, },
15615 { 2032 /* ld4 */, AArch64::LD4i16_POST, Convert__Reg1_3__TypedVectorList4_0161_0__Tie1_1_1__IndexRange0_71_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK_TypedVectorList4_016, MCK_IndexRange0_7, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
15622 { 2032 /* ld4 */, AArch64::LD4i16_POST, Convert__Reg1_4__VecListFour1281_1__Tie1_2_2__IndexRange0_71_2__Tie0_5_5__regXZR, AMFBS_HasNEON, { MCK__DOT_h, MCK_VecListFour128, MCK_IndexRange0_7, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_8 }, },
15623 { 2032 /* ld4 */, AArch64::LD4i16_POST, Convert__Reg1_4__VecListFour1281_1__Tie1_2_2__IndexRange0_71_2__Tie0_5_5__Reg1_6, AMFBS_HasNEON, { MCK__DOT_h, MCK_VecListFour128, MCK_IndexRange0_7, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22972 { 2032 /* ld4 */, AArch64::LD4i16_POST, Convert__Reg1_3__TypedVectorList4_0161_0__Tie1_1_1__IndexRange0_71_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList4_016, MCK_IndexRange0_7, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_8 }, },
22973 { 2032 /* ld4 */, AArch64::LD4i16_POST, Convert__Reg1_3__TypedVectorList4_0161_0__Tie1_1_1__IndexRange0_71_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK_TypedVectorList4_016, MCK_IndexRange0_7, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22980 { 2032 /* ld4 */, AArch64::LD4i16_POST, Convert__Reg1_4__VecListFour1281_1__Tie1_2_2__IndexRange0_71_2__Tie0_5_5__regXZR, AMFBS_HasNEON, { MCK__DOT_h, MCK_VecListFour128, MCK_IndexRange0_7, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_8 }, },
22981 { 2032 /* ld4 */, AArch64::LD4i16_POST, Convert__Reg1_4__VecListFour1281_1__Tie1_2_2__IndexRange0_71_2__Tie0_5_5__Reg1_6, AMFBS_HasNEON, { MCK__DOT_h, MCK_VecListFour128, MCK_IndexRange0_7, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc19313 case AArch64::LD4i16_POST:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc20029 case AArch64::LD4i16_POST:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc13057 case AArch64::LD4i16_POST: {
lib/Target/AArch64/AArch64FalkorHWPFFix.cpp 390 case AArch64::LD4i16_POST:
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp 3938 SelectPostLoadLane(Node, 4, AArch64::LD4i16_POST);
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp 519 { AArch64::LD4i16_POST, "ld4", ".h", 2, true, 8 },