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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc15616 { 2032 /* ld4 */, AArch64::LD4i32_POST, Convert__Reg1_3__TypedVectorList4_0321_0__Tie1_1_1__IndexRange0_31_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList4_032, MCK_IndexRange0_3, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, },
15617 { 2032 /* ld4 */, AArch64::LD4i32_POST, Convert__Reg1_3__TypedVectorList4_0321_0__Tie1_1_1__IndexRange0_31_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK_TypedVectorList4_032, MCK_IndexRange0_3, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
15624 { 2032 /* ld4 */, AArch64::LD4i32_POST, Convert__Reg1_4__VecListFour1281_1__Tie1_2_2__IndexRange0_31_2__Tie0_5_5__regXZR, AMFBS_HasNEON, { MCK__DOT_s, MCK_VecListFour128, MCK_IndexRange0_3, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, },
15625 { 2032 /* ld4 */, AArch64::LD4i32_POST, Convert__Reg1_4__VecListFour1281_1__Tie1_2_2__IndexRange0_31_2__Tie0_5_5__Reg1_6, AMFBS_HasNEON, { MCK__DOT_s, MCK_VecListFour128, MCK_IndexRange0_3, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22974 { 2032 /* ld4 */, AArch64::LD4i32_POST, Convert__Reg1_3__TypedVectorList4_0321_0__Tie1_1_1__IndexRange0_31_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList4_032, MCK_IndexRange0_3, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, },
22975 { 2032 /* ld4 */, AArch64::LD4i32_POST, Convert__Reg1_3__TypedVectorList4_0321_0__Tie1_1_1__IndexRange0_31_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK_TypedVectorList4_032, MCK_IndexRange0_3, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
22982 { 2032 /* ld4 */, AArch64::LD4i32_POST, Convert__Reg1_4__VecListFour1281_1__Tie1_2_2__IndexRange0_31_2__Tie0_5_5__regXZR, AMFBS_HasNEON, { MCK__DOT_s, MCK_VecListFour128, MCK_IndexRange0_3, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, },
22983 { 2032 /* ld4 */, AArch64::LD4i32_POST, Convert__Reg1_4__VecListFour1281_1__Tie1_2_2__IndexRange0_31_2__Tie0_5_5__Reg1_6, AMFBS_HasNEON, { MCK__DOT_s, MCK_VecListFour128, MCK_IndexRange0_3, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc19326 case AArch64::LD4i32_POST:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc20042 case AArch64::LD4i32_POST:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc13033 case AArch64::LD4i32_POST: {
lib/Target/AArch64/AArch64FalkorHWPFFix.cpp 391 case AArch64::LD4i32_POST:
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp 3942 SelectPostLoadLane(Node, 4, AArch64::LD4i32_POST);
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp 520 { AArch64::LD4i32_POST, "ld4", ".s", 2, true, 16 },