|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc16021 { 2552 /* ldnf1sb */, AArch64::LDNF1SB_H_IMM, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__imm_95_0, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
16024 { 2552 /* ldnf1sb */, AArch64::LDNF1SB_H_IMM, Convert__SVEVectorList1161_0__SVEPredicate3bAnyReg1_1__Reg1_5__imm_95_0, AMFBS_HasSVE, { MCK_SVEVectorList116, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
16027 { 2552 /* ldnf1sb */, AArch64::LDNF1SB_H_IMM, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s11_6, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s1, MCK_mul, MCK_vl, MCK__93_ }, },
16030 { 2552 /* ldnf1sb */, AArch64::LDNF1SB_H_IMM, Convert__SVEVectorList1161_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s11_6, AMFBS_HasSVE, { MCK_SVEVectorList116, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s1, MCK_mul, MCK_vl, MCK__93_ }, },
23379 { 2552 /* ldnf1sb */, AArch64::LDNF1SB_H_IMM, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__imm_95_0, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
23382 { 2552 /* ldnf1sb */, AArch64::LDNF1SB_H_IMM, Convert__SVEVectorList1161_0__SVEPredicate3bAnyReg1_1__Reg1_5__imm_95_0, AMFBS_HasSVE, { MCK_SVEVectorList116, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
23385 { 2552 /* ldnf1sb */, AArch64::LDNF1SB_H_IMM, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s11_6, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s1, MCK_mul, MCK_vl, MCK__93_ }, },
23388 { 2552 /* ldnf1sb */, AArch64::LDNF1SB_H_IMM, Convert__SVEVectorList1161_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s11_6, AMFBS_HasSVE, { MCK_SVEVectorList116, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s1, MCK_mul, MCK_vl, MCK__93_ }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc20201 case AArch64::LDNF1SB_H_IMM:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc20917 case AArch64::LDNF1SB_H_IMM:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc 6458 case AArch64::LDNF1SB_H_IMM: