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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenInstrInfo.inc 7686 { 839, 3, 1, 4, 587, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #839 = DUPv16i8lane
7690 { 843, 3, 1, 4, 405, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #843 = DUPv2i64lane
7694 { 847, 3, 1, 4, 405, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #847 = DUPv4i32lane
7696 { 849, 3, 1, 4, 587, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #849 = DUPv8i16lane
8127 { 1280, 3, 1, 4, 247, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #1280 = FCVTZSv2i64_shift
8131 { 1284, 3, 1, 4, 247, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #1284 = FCVTZSv4i32_shift
8133 { 1286, 3, 1, 4, 791, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #1286 = FCVTZSv8i16_shift
8162 { 1315, 3, 1, 4, 247, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #1315 = FCVTZUv2i64_shift
8166 { 1319, 3, 1, 4, 247, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #1319 = FCVTZUv4i32_shift
8168 { 1321, 3, 1, 4, 791, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #1321 = FCVTZUv8i16_shift
10053 { 3206, 3, 1, 4, 641, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3206 = SCVTFv2i64_shift
10057 { 3210, 3, 1, 4, 641, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3210 = SCVTFv4i32_shift
10059 { 3212, 3, 1, 4, 792, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3212 = SCVTFv8i16_shift
10113 { 3266, 3, 1, 4, 543, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3266 = SHLv16i8_shift
10115 { 3268, 3, 1, 4, 543, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3268 = SHLv2i64_shift
10117 { 3270, 3, 1, 4, 543, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3270 = SHLv4i32_shift
10118 { 3271, 3, 1, 4, 543, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3271 = SHLv8i16_shift
10637 { 3790, 3, 1, 4, 235, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3790 = SQSHLUv16i8_shift
10639 { 3792, 3, 1, 4, 235, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3792 = SQSHLUv2i64_shift
10641 { 3794, 3, 1, 4, 235, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3794 = SQSHLUv4i32_shift
10642 { 3795, 3, 1, 4, 235, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3795 = SQSHLUv8i16_shift
10657 { 3810, 3, 1, 4, 547, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3810 = SQSHLv16i8_shift
10665 { 3818, 3, 1, 4, 547, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3818 = SQSHLv2i64_shift
10669 { 3822, 3, 1, 4, 547, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3822 = SQSHLv4i32_shift
10671 { 3824, 3, 1, 4, 547, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3824 = SQSHLv8i16_shift
10804 { 3957, 3, 1, 4, 437, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3957 = SRSHRv16i8_shift
10806 { 3959, 3, 1, 4, 437, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3959 = SRSHRv2i64_shift
10808 { 3961, 3, 1, 4, 437, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3961 = SRSHRv4i32_shift
10809 { 3962, 3, 1, 4, 437, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3962 = SRSHRv8i16_shift
10829 { 3982, 3, 1, 4, 538, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3982 = SSHLLv16i8_shift
10832 { 3985, 3, 1, 4, 538, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3985 = SSHLLv4i32_shift
10833 { 3986, 3, 1, 4, 538, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3986 = SSHLLv8i16_shift
10844 { 3997, 3, 1, 4, 436, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3997 = SSHRv16i8_shift
10846 { 3999, 3, 1, 4, 436, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3999 = SSHRv2i64_shift
10848 { 4001, 3, 1, 4, 436, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #4001 = SSHRv4i32_shift
10849 { 4002, 3, 1, 4, 436, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #4002 = SSHRv8i16_shift
11556 { 4709, 3, 1, 4, 641, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #4709 = UCVTFv2i64_shift
11560 { 4713, 3, 1, 4, 641, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #4713 = UCVTFv4i32_shift
11562 { 4715, 3, 1, 4, 792, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #4715 = UCVTFv8i16_shift
11861 { 5014, 3, 1, 4, 547, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #5014 = UQSHLv16i8_shift
11869 { 5022, 3, 1, 4, 547, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #5022 = UQSHLv2i64_shift
11873 { 5026, 3, 1, 4, 547, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #5026 = UQSHLv4i32_shift
11875 { 5028, 3, 1, 4, 547, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #5028 = UQSHLv8i16_shift
11969 { 5122, 3, 1, 4, 437, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #5122 = URSHRv16i8_shift
11971 { 5124, 3, 1, 4, 437, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #5124 = URSHRv2i64_shift
11973 { 5126, 3, 1, 4, 437, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #5126 = URSHRv4i32_shift
11974 { 5127, 3, 1, 4, 437, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #5127 = URSHRv8i16_shift
11997 { 5150, 3, 1, 4, 538, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #5150 = USHLLv16i8_shift
12000 { 5153, 3, 1, 4, 538, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #5153 = USHLLv4i32_shift
12001 { 5154, 3, 1, 4, 538, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #5154 = USHLLv8i16_shift
12012 { 5165, 3, 1, 4, 436, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #5165 = USHRv16i8_shift
12014 { 5167, 3, 1, 4, 436, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #5167 = USHRv2i64_shift
12016 { 5169, 3, 1, 4, 436, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #5169 = USHRv4i32_shift
12017 { 5170, 3, 1, 4, 436, 0, 0x1ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #5170 = USHRv8i16_shift