|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AArch64/AArch64GenInstrInfo.inc 7744 { 897, 3, 1, 4, 1, 0, 0x1ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr }, // Inst #897 = FABD16
7766 { 919, 3, 1, 4, 431, 0, 0x1ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr }, // Inst #919 = FACGE16
7777 { 930, 3, 1, 4, 431, 0, 0x1ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr }, // Inst #930 = FACGT16
7792 { 945, 3, 1, 4, 827, 0, 0x1ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr }, // Inst #945 = FADDHrr
7836 { 989, 3, 1, 4, 427, 0, 0x1ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr }, // Inst #989 = FCMEQ16
7858 { 1011, 3, 1, 4, 831, 0, 0x1ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr }, // Inst #1011 = FCMGE16
7880 { 1033, 3, 1, 4, 427, 0, 0x1ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr }, // Inst #1033 = FCMGT16
8176 { 1329, 3, 1, 4, 832, 0, 0x1ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr }, // Inst #1329 = FDIVHrr
8206 { 1359, 3, 1, 4, 297, 0, 0x1ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr }, // Inst #1359 = FMAXHrr
8208 { 1361, 3, 1, 4, 297, 0, 0x1ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr }, // Inst #1361 = FMAXNMHrr
8268 { 1421, 3, 1, 4, 297, 0, 0x1ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr }, // Inst #1421 = FMINHrr
8270 { 1423, 3, 1, 4, 297, 0, 0x1ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr }, // Inst #1423 = FMINNMHrr
8422 { 1575, 3, 1, 4, 833, 0, 0x1ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr }, // Inst #1575 = FMULHrr
8424 { 1577, 3, 1, 4, 834, 0, 0x1ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr }, // Inst #1577 = FMULX16
8498 { 1651, 3, 1, 4, 833, 0, 0x1ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr }, // Inst #1651 = FNMULHrr
8511 { 1664, 3, 1, 4, 770, 0, 0x1ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr }, // Inst #1664 = FRECPS16
8636 { 1789, 3, 1, 4, 770, 0, 0x1ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr }, // Inst #1789 = FRSQRTS16
8662 { 1815, 3, 1, 4, 827, 0, 0x1ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr }, // Inst #1815 = FSUBHrr
10349 { 3502, 3, 1, 4, 512, 0, 0x1ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr }, // Inst #3502 = SQADDv1i16
10442 { 3595, 3, 1, 4, 446, 0, 0x1ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr }, // Inst #3595 = SQDMULHv1i16
10564 { 3717, 3, 1, 4, 446, 0, 0x1ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr }, // Inst #3717 = SQRDMULHv1i16
10585 { 3738, 3, 1, 4, 442, 0, 0x1ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr }, // Inst #3738 = SQRSHLv1i16
10658 { 3811, 3, 1, 4, 237, 0, 0x1ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr }, // Inst #3811 = SQSHLv1i16
10721 { 3874, 3, 1, 4, 516, 0, 0x1ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr }, // Inst #3874 = SQSUBv1i16
11756 { 4909, 3, 1, 4, 512, 0, 0x1ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr }, // Inst #4909 = UQADDv1i16
11819 { 4972, 3, 1, 4, 442, 0, 0x1ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr }, // Inst #4972 = UQRSHLv1i16
11862 { 5015, 3, 1, 4, 237, 0, 0x1ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr }, // Inst #5015 = UQSHLv1i16
11910 { 5063, 3, 1, 4, 516, 0, 0x1ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr }, // Inst #5063 = UQSUBv1i16