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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenInstrInfo.inc 7757 { 910, 2, 1, 4, 818, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #910 = FABSSr
7846 { 999, 2, 1, 4, 734, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #999 = FCMEQv1i32rz
7868 { 1021, 2, 1, 4, 735, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1021 = FCMGEv1i32rz
7890 { 1043, 2, 1, 4, 734, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1043 = FCMGTv1i32rz
7919 { 1072, 2, 1, 4, 734, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1072 = FCMLEv1i32rz
7930 { 1083, 2, 1, 4, 734, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1083 = FCMLTv1i32rz
7950 { 1103, 2, 0, 4, 626, 0, 0x1ULL, nullptr, ImplicitList1, OperandInfo164, -1 ,nullptr }, // Inst #1103 = FCMPESrr
7954 { 1107, 2, 0, 4, 626, 0, 0x1ULL, nullptr, ImplicitList1, OperandInfo164, -1 ,nullptr }, // Inst #1107 = FCMPSrr
7971 { 1124, 2, 1, 4, 737, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1124 = FCVTASv1i32
7985 { 1138, 2, 1, 4, 737, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1138 = FCVTAUv1i32
8009 { 1162, 2, 1, 4, 737, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1162 = FCVTMSv1i32
8023 { 1176, 2, 1, 4, 737, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1176 = FCVTMUv1i32
8037 { 1190, 2, 1, 4, 737, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1190 = FCVTNSv1i32
8053 { 1206, 2, 1, 4, 737, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1206 = FCVTNUv1i32
8071 { 1224, 2, 1, 4, 737, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1224 = FCVTPSv1i32
8085 { 1238, 2, 1, 4, 737, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1238 = FCVTPUv1i32
8122 { 1275, 2, 1, 4, 474, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1275 = FCVTZSv1i32
8157 { 1310, 2, 1, 4, 474, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1310 = FCVTZUv1i32
8404 { 1557, 2, 1, 4, 637, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1557 = FMOVSr
8470 { 1623, 2, 1, 4, 628, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1623 = FNEGSr
8504 { 1657, 2, 1, 4, 746, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1657 = FRECPEv1i32
8526 { 1679, 2, 1, 4, 598, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1679 = FRECPXv1i32
8529 { 1682, 2, 1, 4, 298, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1682 = FRINT32XSr
8534 { 1687, 2, 1, 4, 298, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1687 = FRINT32ZSr
8539 { 1692, 2, 1, 4, 298, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1692 = FRINT64XSr
8544 { 1697, 2, 1, 4, 298, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1697 = FRINT64ZSr
8550 { 1703, 2, 1, 4, 631, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1703 = FRINTASr
8561 { 1714, 2, 1, 4, 631, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1714 = FRINTISr
8572 { 1725, 2, 1, 4, 631, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1725 = FRINTMSr
8583 { 1736, 2, 1, 4, 631, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1736 = FRINTNSr
8594 { 1747, 2, 1, 4, 631, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1747 = FRINTPSr
8605 { 1758, 2, 1, 4, 631, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1758 = FRINTXSr
8616 { 1769, 2, 1, 4, 631, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1769 = FRINTZSr
8629 { 1782, 2, 1, 4, 747, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1782 = FRSQRTEv1i32
8652 { 1805, 2, 1, 4, 300, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1805 = FSQRTSr
10048 { 3201, 2, 1, 4, 793, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #3201 = SCVTFv1i32
10083 { 3236, 2, 1, 4, 624, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #3236 = SHA1Hrr
10327 { 3480, 2, 1, 4, 755, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #3480 = SQABSv1i32
10504 { 3657, 2, 1, 4, 525, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #3657 = SQNEGv1i32
11551 { 4704, 2, 1, 4, 793, 0, 0x1ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #4704 = UCVTFv1i32