reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenInstrInfo.inc
 8333   { 1486,	5,	1,	4,	110,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, nullptr, OperandInfo209, -1 ,nullptr },  // Inst #1486 = FMLALB_ZZZI_SHH
 8335   { 1488,	5,	1,	4,	110,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, nullptr, OperandInfo209, -1 ,nullptr },  // Inst #1488 = FMLALT_ZZZI_SHH
 8345   { 1498,	5,	1,	4,	110,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, nullptr, OperandInfo209, -1 ,nullptr },  // Inst #1498 = FMLA_ZZZI_H
 8346   { 1499,	5,	1,	4,	110,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, nullptr, OperandInfo209, -1 ,nullptr },  // Inst #1499 = FMLA_ZZZI_S
 8364   { 1517,	5,	1,	4,	110,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, nullptr, OperandInfo209, -1 ,nullptr },  // Inst #1517 = FMLSLB_ZZZI_SHH
 8366   { 1519,	5,	1,	4,	110,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, nullptr, OperandInfo209, -1 ,nullptr },  // Inst #1519 = FMLSLT_ZZZI_SHH
 8376   { 1529,	5,	1,	4,	110,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, nullptr, OperandInfo209, -1 ,nullptr },  // Inst #1529 = FMLS_ZZZI_H
 8377   { 1530,	5,	1,	4,	110,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, nullptr, OperandInfo209, -1 ,nullptr },  // Inst #1530 = FMLS_ZZZI_S
 9585   { 2738,	5,	1,	4,	451,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, nullptr, OperandInfo209, -1 ,nullptr },  // Inst #2738 = MLA_ZZZI_H
 9586   { 2739,	5,	1,	4,	451,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, nullptr, OperandInfo209, -1 ,nullptr },  // Inst #2739 = MLA_ZZZI_S
 9602   { 2755,	5,	1,	4,	451,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, nullptr, OperandInfo209, -1 ,nullptr },  // Inst #2755 = MLS_ZZZI_H
 9603   { 2756,	5,	1,	4,	451,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, nullptr, OperandInfo209, -1 ,nullptr },  // Inst #2756 = MLS_ZZZI_S
10067   { 3220,	5,	1,	4,	0,	0, 0x9ULL, nullptr, nullptr, OperandInfo209, -1 ,nullptr },  // Inst #3220 = SDOT_ZZZI_S
10238   { 3391,	5,	1,	4,	222,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, nullptr, OperandInfo209, -1 ,nullptr },  // Inst #3391 = SMLALB_ZZZI_S
10243   { 3396,	5,	1,	4,	222,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, nullptr, OperandInfo209, -1 ,nullptr },  // Inst #3396 = SMLALT_ZZZI_S
10258   { 3411,	5,	1,	4,	222,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, nullptr, OperandInfo209, -1 ,nullptr },  // Inst #3411 = SMLSLB_ZZZI_S
10263   { 3416,	5,	1,	4,	222,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, nullptr, OperandInfo209, -1 ,nullptr },  // Inst #3416 = SMLSLT_ZZZI_S
10389   { 3542,	5,	1,	4,	822,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, nullptr, OperandInfo209, -1 ,nullptr },  // Inst #3542 = SQDMLALB_ZZZI_S
10394   { 3547,	5,	1,	4,	822,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, nullptr, OperandInfo209, -1 ,nullptr },  // Inst #3547 = SQDMLALT_ZZZI_S
10414   { 3567,	5,	1,	4,	822,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, nullptr, OperandInfo209, -1 ,nullptr },  // Inst #3567 = SQDMLSLB_ZZZI_S
10419   { 3572,	5,	1,	4,	822,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, nullptr, OperandInfo209, -1 ,nullptr },  // Inst #3572 = SQDMLSLT_ZZZI_S
10520   { 3673,	5,	1,	4,	843,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, nullptr, OperandInfo209, -1 ,nullptr },  // Inst #3673 = SQRDMLAH_ZZZI_H
10521   { 3674,	5,	1,	4,	843,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, nullptr, OperandInfo209, -1 ,nullptr },  // Inst #3674 = SQRDMLAH_ZZZI_S
10539   { 3692,	5,	1,	4,	843,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, nullptr, OperandInfo209, -1 ,nullptr },  // Inst #3692 = SQRDMLSH_ZZZI_H
10540   { 3693,	5,	1,	4,	843,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, nullptr, OperandInfo209, -1 ,nullptr },  // Inst #3693 = SQRDMLSH_ZZZI_S
11571   { 4724,	5,	1,	4,	0,	0, 0x9ULL, nullptr, nullptr, OperandInfo209, -1 ,nullptr },  // Inst #4724 = UDOT_ZZZI_S
11670   { 4823,	5,	1,	4,	222,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, nullptr, OperandInfo209, -1 ,nullptr },  // Inst #4823 = UMLALB_ZZZI_S
11675   { 4828,	5,	1,	4,	222,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, nullptr, OperandInfo209, -1 ,nullptr },  // Inst #4828 = UMLALT_ZZZI_S
11690   { 4843,	5,	1,	4,	222,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, nullptr, OperandInfo209, -1 ,nullptr },  // Inst #4843 = UMLSLB_ZZZI_S
11695   { 4848,	5,	1,	4,	222,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, nullptr, OperandInfo209, -1 ,nullptr },  // Inst #4848 = UMLSLT_ZZZI_S