reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenInstrInfo.inc
 8693   { 1846,	4,	1,	4,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo232, -1 ,nullptr },  // Inst #1846 = GLD1B_D_IMM_REAL
 8697   { 1850,	4,	1,	4,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo232, -1 ,nullptr },  // Inst #1850 = GLD1B_S_IMM_REAL
 8700   { 1853,	4,	1,	4,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo232, -1 ,nullptr },  // Inst #1853 = GLD1D_IMM_REAL
 8707   { 1860,	4,	1,	4,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo232, -1 ,nullptr },  // Inst #1860 = GLD1H_D_IMM_REAL
 8714   { 1867,	4,	1,	4,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo232, -1 ,nullptr },  // Inst #1867 = GLD1H_S_IMM_REAL
 8719   { 1872,	4,	1,	4,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo232, -1 ,nullptr },  // Inst #1872 = GLD1SB_D_IMM_REAL
 8723   { 1876,	4,	1,	4,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo232, -1 ,nullptr },  // Inst #1876 = GLD1SB_S_IMM_REAL
 8726   { 1879,	4,	1,	4,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo232, -1 ,nullptr },  // Inst #1879 = GLD1SH_D_IMM_REAL
 8733   { 1886,	4,	1,	4,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo232, -1 ,nullptr },  // Inst #1886 = GLD1SH_S_IMM_REAL
 8738   { 1891,	4,	1,	4,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo232, -1 ,nullptr },  // Inst #1891 = GLD1SW_D_IMM_REAL
 8745   { 1898,	4,	1,	4,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo232, -1 ,nullptr },  // Inst #1898 = GLD1W_D_IMM_REAL
 8752   { 1905,	4,	1,	4,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo232, -1 ,nullptr },  // Inst #1905 = GLD1W_IMM_REAL
 8757   { 1910,	4,	1,	4,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, ImplicitList7, ImplicitList7, OperandInfo232, -1 ,nullptr },  // Inst #1910 = GLDFF1B_D_IMM_REAL
 8761   { 1914,	4,	1,	4,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, ImplicitList7, ImplicitList7, OperandInfo232, -1 ,nullptr },  // Inst #1914 = GLDFF1B_S_IMM_REAL
 8764   { 1917,	4,	1,	4,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, ImplicitList7, ImplicitList7, OperandInfo232, -1 ,nullptr },  // Inst #1917 = GLDFF1D_IMM_REAL
 8771   { 1924,	4,	1,	4,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, ImplicitList7, ImplicitList7, OperandInfo232, -1 ,nullptr },  // Inst #1924 = GLDFF1H_D_IMM_REAL
 8778   { 1931,	4,	1,	4,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, ImplicitList7, ImplicitList7, OperandInfo232, -1 ,nullptr },  // Inst #1931 = GLDFF1H_S_IMM_REAL
 8783   { 1936,	4,	1,	4,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, ImplicitList7, ImplicitList7, OperandInfo232, -1 ,nullptr },  // Inst #1936 = GLDFF1SB_D_IMM_REAL
 8787   { 1940,	4,	1,	4,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, ImplicitList7, ImplicitList7, OperandInfo232, -1 ,nullptr },  // Inst #1940 = GLDFF1SB_S_IMM_REAL
 8790   { 1943,	4,	1,	4,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, ImplicitList7, ImplicitList7, OperandInfo232, -1 ,nullptr },  // Inst #1943 = GLDFF1SH_D_IMM_REAL
 8797   { 1950,	4,	1,	4,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, ImplicitList7, ImplicitList7, OperandInfo232, -1 ,nullptr },  // Inst #1950 = GLDFF1SH_S_IMM_REAL
 8802   { 1955,	4,	1,	4,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, ImplicitList7, ImplicitList7, OperandInfo232, -1 ,nullptr },  // Inst #1955 = GLDFF1SW_D_IMM_REAL
 8809   { 1962,	4,	1,	4,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, ImplicitList7, ImplicitList7, OperandInfo232, -1 ,nullptr },  // Inst #1962 = GLDFF1W_D_IMM_REAL
 8816   { 1969,	4,	1,	4,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, ImplicitList7, ImplicitList7, OperandInfo232, -1 ,nullptr },  // Inst #1969 = GLDFF1W_IMM_REAL
10864   { 4017,	4,	0,	4,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo232, -1 ,nullptr },  // Inst #4017 = SST1B_D_IMM
10867   { 4020,	4,	0,	4,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo232, -1 ,nullptr },  // Inst #4020 = SST1B_S_IMM
10871   { 4024,	4,	0,	4,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo232, -1 ,nullptr },  // Inst #4024 = SST1D_IMM
10878   { 4031,	4,	0,	4,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo232, -1 ,nullptr },  // Inst #4031 = SST1H_D_IMM
10884   { 4037,	4,	0,	4,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo232, -1 ,nullptr },  // Inst #4037 = SST1H_S_IMM
10890   { 4043,	4,	0,	4,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo232, -1 ,nullptr },  // Inst #4043 = SST1W_D_IMM
10896   { 4049,	4,	0,	4,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo232, -1 ,nullptr },  // Inst #4049 = SST1W_IMM