|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AArch64/AArch64GenInstrInfo.inc10150 { 3303, 4, 1, 4, 523, 0, 0x1ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #3303 = SLId
10152 { 3305, 4, 1, 4, 523, 0, 0x1ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #3305 = SLIv2i32_shift
10154 { 3307, 4, 1, 4, 523, 0, 0x1ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #3307 = SLIv4i16_shift
10157 { 3310, 4, 1, 4, 523, 0, 0x1ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #3310 = SLIv8i8_shift
10775 { 3928, 4, 1, 4, 779, 0, 0x1ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #3928 = SRId
10777 { 3930, 4, 1, 4, 779, 0, 0x1ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #3930 = SRIv2i32_shift
10779 { 3932, 4, 1, 4, 779, 0, 0x1ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #3932 = SRIv4i16_shift
10782 { 3935, 4, 1, 4, 779, 0, 0x1ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #3935 = SRIv8i8_shift
10815 { 3968, 4, 1, 4, 231, 0, 0x1ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #3968 = SRSRAd
10817 { 3970, 4, 1, 4, 508, 0, 0x1ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #3970 = SRSRAv2i32_shift
10819 { 3972, 4, 1, 4, 508, 0, 0x1ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #3972 = SRSRAv4i16_shift
10822 { 3975, 4, 1, 4, 508, 0, 0x1ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #3975 = SRSRAv8i8_shift
10855 { 4008, 4, 1, 4, 231, 0, 0x1ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #4008 = SSRAd
10857 { 4010, 4, 1, 4, 508, 0, 0x1ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #4010 = SSRAv2i32_shift
10859 { 4012, 4, 1, 4, 508, 0, 0x1ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #4012 = SSRAv4i16_shift
10862 { 4015, 4, 1, 4, 508, 0, 0x1ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #4015 = SSRAv8i8_shift
11983 { 5136, 4, 1, 4, 231, 0, 0x1ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #5136 = URSRAd
11985 { 5138, 4, 1, 4, 508, 0, 0x1ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #5138 = URSRAv2i32_shift
11987 { 5140, 4, 1, 4, 508, 0, 0x1ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #5140 = URSRAv4i16_shift
11990 { 5143, 4, 1, 4, 508, 0, 0x1ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #5143 = URSRAv8i8_shift
12038 { 5191, 4, 1, 4, 231, 0, 0x1ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #5191 = USRAd
12040 { 5193, 4, 1, 4, 508, 0, 0x1ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #5193 = USRAv2i32_shift
12042 { 5195, 4, 1, 4, 508, 0, 0x1ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #5195 = USRAv4i16_shift
12045 { 5198, 4, 1, 4, 508, 0, 0x1ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #5198 = USRAv8i8_shift