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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc18117 { 5234 /* st1 */, AArch64::ST1Fourv4s_POST, Convert__Reg1_2__TypedVectorList4_4321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList4_432, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_64 }, },
18118 { 5234 /* st1 */, AArch64::ST1Fourv4s_POST, Convert__Reg1_2__TypedVectorList4_4321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList4_432, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
18215 { 5234 /* st1 */, AArch64::ST1Fourv4s_POST, Convert__Reg1_3__VecListFour1281_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_64 }, },
18216 { 5234 /* st1 */, AArch64::ST1Fourv4s_POST, Convert__Reg1_3__VecListFour1281_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
25475 { 5234 /* st1 */, AArch64::ST1Fourv4s_POST, Convert__Reg1_2__TypedVectorList4_4321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList4_432, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_64 }, },
25476 { 5234 /* st1 */, AArch64::ST1Fourv4s_POST, Convert__Reg1_2__TypedVectorList4_4321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList4_432, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
25573 { 5234 /* st1 */, AArch64::ST1Fourv4s_POST, Convert__Reg1_3__VecListFour1281_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_64 }, },
25574 { 5234 /* st1 */, AArch64::ST1Fourv4s_POST, Convert__Reg1_3__VecListFour1281_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc23697 case AArch64::ST1Fourv4s_POST:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc24413 case AArch64::ST1Fourv4s_POST:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc12792 case AArch64::ST1Fourv4s_POST:
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp 4114 SelectPostStore(Node, 4, AArch64::ST1Fourv4s_POST);
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp 618 { AArch64::ST1Fourv4s_POST, "st1", ".4s", 1, false, 64 },