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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc18625 { 5311 /* st4 */, AArch64::ST4i32_POST, Convert__Reg1_3__TypedVectorList4_0321_0__IndexRange0_31_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList4_032, MCK_IndexRange0_3, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, },
18626 { 5311 /* st4 */, AArch64::ST4i32_POST, Convert__Reg1_3__TypedVectorList4_0321_0__IndexRange0_31_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK_TypedVectorList4_032, MCK_IndexRange0_3, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
18633 { 5311 /* st4 */, AArch64::ST4i32_POST, Convert__Reg1_4__VecListFour1281_1__IndexRange0_31_2__Tie0_5_5__regXZR, AMFBS_HasNEON, { MCK__DOT_s, MCK_VecListFour128, MCK_IndexRange0_3, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, },
18634 { 5311 /* st4 */, AArch64::ST4i32_POST, Convert__Reg1_4__VecListFour1281_1__IndexRange0_31_2__Tie0_5_5__Reg1_6, AMFBS_HasNEON, { MCK__DOT_s, MCK_VecListFour128, MCK_IndexRange0_3, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
25983 { 5311 /* st4 */, AArch64::ST4i32_POST, Convert__Reg1_3__TypedVectorList4_0321_0__IndexRange0_31_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList4_032, MCK_IndexRange0_3, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, },
25984 { 5311 /* st4 */, AArch64::ST4i32_POST, Convert__Reg1_3__TypedVectorList4_0321_0__IndexRange0_31_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK_TypedVectorList4_032, MCK_IndexRange0_3, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
25991 { 5311 /* st4 */, AArch64::ST4i32_POST, Convert__Reg1_4__VecListFour1281_1__IndexRange0_31_2__Tie0_5_5__regXZR, AMFBS_HasNEON, { MCK__DOT_s, MCK_VecListFour128, MCK_IndexRange0_3, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, },
25992 { 5311 /* st4 */, AArch64::ST4i32_POST, Convert__Reg1_4__VecListFour1281_1__IndexRange0_31_2__Tie0_5_5__Reg1_6, AMFBS_HasNEON, { MCK__DOT_s, MCK_VecListFour128, MCK_IndexRange0_3, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc24776 case AArch64::ST4i32_POST:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc25492 case AArch64::ST4i32_POST:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc12878 case AArch64::ST4i32_POST: {
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp 4176 SelectPostStoreLane(Node, 4, AArch64::ST4i32_POST);
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp 674 { AArch64::ST4i32_POST, "st4", ".s", 1, true, 16 },