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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc16724 { 3439 /* neg */, AArch64::SUBWrs, Convert__Reg1_0__regWZR__Reg1_1__imm_95_0, AMFBS_None, { MCK_GPR32, MCK_GPR32 }, },
16726 { 3439 /* neg */, AArch64::SUBWrs, Convert__Reg1_0__regWZR__Reg1_1__ArithmeticShifter321_2, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_ArithmeticShifter32 }, },
18944 { 5924 /* sub */, AArch64::SUBWrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, },
18960 { 5924 /* sub */, AArch64::SUBWrs, Convert__Reg1_0__Reg1_1__Reg1_2__ArithmeticShifter321_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_ArithmeticShifter32 }, },
24082 { 3439 /* neg */, AArch64::SUBWrs, Convert__Reg1_0__regWZR__Reg1_1__imm_95_0, AMFBS_None, { MCK_GPR32, MCK_GPR32 }, },
24091 { 3439 /* neg */, AArch64::SUBWrs, Convert__Reg1_0__regWZR__Reg1_1__ArithmeticShifter321_2, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_ArithmeticShifter32 }, },
26302 { 5924 /* sub */, AArch64::SUBWrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, },
26325 { 5924 /* sub */, AArch64::SUBWrs, Convert__Reg1_0__Reg1_1__Reg1_2__ArithmeticShifter321_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_ArithmeticShifter32 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc25939 case AArch64::SUBWrs:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc26655 case AArch64::SUBWrs:
gen/lib/Target/AArch64/AArch64GenInstrInfo.inc18035 case AArch64::SUBWrs:
18374 case AArch64::SUBWrs:
29773 case AArch64::SUBWrs:
30112 case AArch64::SUBWrs:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc15476 case AArch64::SUBWrs:
lib/Target/AArch64/AArch64CondBrTuning.cpp 165 case AArch64::SUBWrs:
lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp 441 case AArch64::SUBWrr: Opcode = AArch64::SUBWrs; break;
lib/Target/AArch64/AArch64FastISel.cpp 1415 { { AArch64::SUBWrs, AArch64::SUBXrs },
lib/Target/AArch64/AArch64InstrInfo.cpp 797 case AArch64::SUBWrs:
1119 return MIDefinesZeroReg ? AArch64::SUBSWrs : AArch64::SUBWrs;
1876 case AArch64::SUBWrs:
lib/Target/AArch64/AArch64MacroFusion.cpp 102 case AArch64::SUBWrs:
286 case AArch64::SUBWrs:
332 case AArch64::SUBWrs:
362 case AArch64::SUBWrs:
lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp 948 case AArch64::SUBWrs: