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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc15516 static const MCOperandInfo OperandInfo174[] = { { AMDGPU::AReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15517 static const MCOperandInfo OperandInfo175[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AMDGPU::AReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
gen/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc11269 { AReg_64, AReg_64Bits, 3019, 255, sizeof(AReg_64Bits), AMDGPU::AReg_64RegClassID, 5, true },
20648 &AMDGPUMCRegisterClasses[AReg_64RegClassID],
lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp 1929 case 2: return AMDGPU::AReg_64RegClassID;
lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp 942 case OPW64: return AReg_64RegClassID;
lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp 422 MRI.getRegClass(AMDGPU::AReg_64RegClassID).contains(Reg))
lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp 1096 case AMDGPU::AReg_64RegClassID: