reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AMDGPU/AMDGPUGenDAGISel.inc
50400 /*108336*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
50414 /*108374*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
50456 /*108488*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
50470 /*108526*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
50512 /*108640*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
50526 /*108678*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
50568 /*108792*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
50582 /*108830*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
50624 /*108944*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
50638 /*108982*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
50680 /*109096*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
50694 /*109134*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
50720 /*109208*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
50747 /*109283*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
50774 /*109358*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
50801 /*109433*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
50828 /*109508*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
50855 /*109583*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
50902 /*109705*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
50916 /*109743*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
50958 /*109857*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
50972 /*109895*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51014 /*110009*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51028 /*110047*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51070 /*110161*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51084 /*110199*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51126 /*110313*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51140 /*110351*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51182 /*110465*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51196 /*110503*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51222 /*110577*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51249 /*110652*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51276 /*110727*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51303 /*110802*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51330 /*110877*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51357 /*110952*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51404 /*111074*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51418 /*111112*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51460 /*111226*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51474 /*111264*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51516 /*111378*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51530 /*111416*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51572 /*111530*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51586 /*111568*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51628 /*111682*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51642 /*111720*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51684 /*111834*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51698 /*111872*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51724 /*111946*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51751 /*112021*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51778 /*112096*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51805 /*112171*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51832 /*112246*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51859 /*112321*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51897 /*112407*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51908 /*112433*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51941 /*112511*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51952 /*112537*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51972 /*112587*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
51993 /*112638*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
52014 /*112689*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
52035 /*112740*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
52056 /*112791*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
52077 /*112842*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
52098 /*112893*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
52119 /*112944*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
52157 /*113030*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
52168 /*113056*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
52201 /*113134*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
52212 /*113160*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
52232 /*113210*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
52253 /*113261*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
52274 /*113312*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
52295 /*113363*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
52316 /*113414*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
52337 /*113465*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
52358 /*113516*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
52379 /*113567*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
52417 /*113653*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
52428 /*113679*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
52461 /*113757*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
52472 /*113783*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
52492 /*113833*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
52513 /*113884*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
52534 /*113935*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
52555 /*113986*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
52576 /*114037*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
52597 /*114088*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
52618 /*114139*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
52639 /*114190*/          OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
62890 /*137201*/        OPC_EmitInteger, MVT::i32, AMDGPU::SReg_32RegClassID,
gen/lib/Target/AMDGPU/AMDGPUGenGlobalISel.inc
  714         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
 1408         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
 1409         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AMDGPU::SReg_32RegClassID,
 1410         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AMDGPU::SReg_32RegClassID,
 1469         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
 1566         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
 1567         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AMDGPU::SReg_32RegClassID,
 1578         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
 1579         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AMDGPU::SReg_32RegClassID,
 1621       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
 1622       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AMDGPU::SReg_32RegClassID,
 1634       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
 1635       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AMDGPU::SReg_32RegClassID,
 1647       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
 1648       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AMDGPU::SReg_32RegClassID,
 1660       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
 1661       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AMDGPU::SReg_32RegClassID,
 1673       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
 1674       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AMDGPU::SReg_32RegClassID,
 1686       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
 1687       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AMDGPU::SReg_32RegClassID,
 1833       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
 1834       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AMDGPU::SReg_32RegClassID,
 1846       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
 1847       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AMDGPU::SReg_32RegClassID,
 1859       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
 1860       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AMDGPU::SReg_32RegClassID,
 1872       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
 1873       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AMDGPU::SReg_32RegClassID,
 1885       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
 1886       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AMDGPU::SReg_32RegClassID,
 1898       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
 1899       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AMDGPU::SReg_32RegClassID,
13257         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
13286         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
13300         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
13815         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
15511       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
15526       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
15568         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
15569         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AMDGPU::SReg_32RegClassID,
15570         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AMDGPU::SReg_32RegClassID,
15610         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AMDGPU::SReg_32RegClassID,
15673         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
15674         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AMDGPU::SReg_32RegClassID,
15675         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AMDGPU::SReg_32RegClassID,
15715         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AMDGPU::SReg_32RegClassID,
15778         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
15779         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AMDGPU::SReg_32RegClassID,
15780         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AMDGPU::SReg_32RegClassID,
15820         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AMDGPU::SReg_32RegClassID,
17749         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
17753         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AMDGPU::SReg_32RegClassID,
17793         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
17794         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AMDGPU::SReg_32RegClassID,
17835         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
17839         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AMDGPU::SReg_32RegClassID,
17857         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
17858         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AMDGPU::SReg_32RegClassID,
17984         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
17988         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AMDGPU::SReg_32RegClassID,
18028         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
18029         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AMDGPU::SReg_32RegClassID,
18656         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
18657         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AMDGPU::SReg_32RegClassID,
18698         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
18699         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AMDGPU::SReg_32RegClassID,
18781         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
18782         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AMDGPU::SReg_32RegClassID,
19556         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
19601         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
19646         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
19691         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
19741         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
19752         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
19783         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
20213         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AMDGPU::SReg_32RegClassID,
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc
15378 static const MCOperandInfo OperandInfo36[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15379 static const MCOperandInfo OperandInfo37[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15380 static const MCOperandInfo OperandInfo38[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15381 static const MCOperandInfo OperandInfo39[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15382 static const MCOperandInfo OperandInfo40[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15383 static const MCOperandInfo OperandInfo41[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15384 static const MCOperandInfo OperandInfo42[] = { { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15385 static const MCOperandInfo OperandInfo43[] = { { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15386 static const MCOperandInfo OperandInfo44[] = { { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15387 static const MCOperandInfo OperandInfo45[] = { { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15388 static const MCOperandInfo OperandInfo46[] = { { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15389 static const MCOperandInfo OperandInfo47[] = { { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15390 static const MCOperandInfo OperandInfo48[] = { { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15391 static const MCOperandInfo OperandInfo49[] = { { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15392 static const MCOperandInfo OperandInfo50[] = { { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15393 static const MCOperandInfo OperandInfo51[] = { { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15394 static const MCOperandInfo OperandInfo52[] = { { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15395 static const MCOperandInfo OperandInfo53[] = { { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15396 static const MCOperandInfo OperandInfo54[] = { { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15397 static const MCOperandInfo OperandInfo55[] = { { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15398 static const MCOperandInfo OperandInfo56[] = { { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15399 static const MCOperandInfo OperandInfo57[] = { { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15400 static const MCOperandInfo OperandInfo58[] = { { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15401 static const MCOperandInfo OperandInfo59[] = { { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15402 static const MCOperandInfo OperandInfo60[] = { { AMDGPU::VReg_96RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15403 static const MCOperandInfo OperandInfo61[] = { { AMDGPU::VReg_96RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15404 static const MCOperandInfo OperandInfo62[] = { { AMDGPU::VReg_96RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15405 static const MCOperandInfo OperandInfo63[] = { { AMDGPU::VReg_96RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15406 static const MCOperandInfo OperandInfo64[] = { { AMDGPU::VReg_96RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15407 static const MCOperandInfo OperandInfo65[] = { { AMDGPU::VReg_96RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15408 static const MCOperandInfo OperandInfo66[] = { { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15409 static const MCOperandInfo OperandInfo67[] = { { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15410 static const MCOperandInfo OperandInfo68[] = { { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15411 static const MCOperandInfo OperandInfo69[] = { { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15412 static const MCOperandInfo OperandInfo70[] = { { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15413 static const MCOperandInfo OperandInfo71[] = { { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15414 static const MCOperandInfo OperandInfo72[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15415 static const MCOperandInfo OperandInfo73[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15416 static const MCOperandInfo OperandInfo74[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15417 static const MCOperandInfo OperandInfo75[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15418 static const MCOperandInfo OperandInfo76[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15419 static const MCOperandInfo OperandInfo77[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15420 static const MCOperandInfo OperandInfo78[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
15421 static const MCOperandInfo OperandInfo79[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
15422 static const MCOperandInfo OperandInfo80[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
15423 static const MCOperandInfo OperandInfo81[] = { { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15462 static const MCOperandInfo OperandInfo120[] = { { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15502 static const MCOperandInfo OperandInfo160[] = { { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_IMM_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15503 static const MCOperandInfo OperandInfo161[] = { { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_IMM_INT32, 0 }, };
15508 static const MCOperandInfo OperandInfo166[] = { { AMDGPU::AReg_1024RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15509 static const MCOperandInfo OperandInfo167[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AMDGPU::AReg_1024RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15510 static const MCOperandInfo OperandInfo168[] = { { AMDGPU::AReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15511 static const MCOperandInfo OperandInfo169[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AMDGPU::AReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15512 static const MCOperandInfo OperandInfo170[] = { { AMDGPU::AGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15513 static const MCOperandInfo OperandInfo171[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AMDGPU::AGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15514 static const MCOperandInfo OperandInfo172[] = { { AMDGPU::AReg_512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15515 static const MCOperandInfo OperandInfo173[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AMDGPU::AReg_512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15516 static const MCOperandInfo OperandInfo174[] = { { AMDGPU::AReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15517 static const MCOperandInfo OperandInfo175[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AMDGPU::AReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15522 static const MCOperandInfo OperandInfo180[] = { { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15526 static const MCOperandInfo OperandInfo184[] = { { AMDGPU::VReg_1024RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15527 static const MCOperandInfo OperandInfo185[] = { { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15528 static const MCOperandInfo OperandInfo186[] = { { AMDGPU::VReg_160RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15529 static const MCOperandInfo OperandInfo187[] = { { AMDGPU::VReg_256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15530 static const MCOperandInfo OperandInfo188[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15531 static const MCOperandInfo OperandInfo189[] = { { AMDGPU::VReg_512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15532 static const MCOperandInfo OperandInfo190[] = { { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15533 static const MCOperandInfo OperandInfo191[] = { { AMDGPU::VReg_96RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15535 static const MCOperandInfo OperandInfo193[] = { { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_IMM_INT32, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_IMM_INT32, 0 }, };
15535 static const MCOperandInfo OperandInfo193[] = { { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_IMM_INT32, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_IMM_INT32, 0 }, };
15535 static const MCOperandInfo OperandInfo193[] = { { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_IMM_INT32, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_IMM_INT32, 0 }, };
15536 static const MCOperandInfo OperandInfo194[] = { { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_IMM_INT32, 0 }, };
15536 static const MCOperandInfo OperandInfo194[] = { { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_IMM_INT32, 0 }, };
15537 static const MCOperandInfo OperandInfo195[] = { { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15537 static const MCOperandInfo OperandInfo195[] = { { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15541 static const MCOperandInfo OperandInfo199[] = { { AMDGPU::SReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_64RegClassID, 0, AMDGPU::OPERAND_REG_IMM_INT64, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_IMM_INT32, 0 }, };
15543 static const MCOperandInfo OperandInfo201[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15545 static const MCOperandInfo OperandInfo203[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { AMDGPU::SReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15548 static const MCOperandInfo OperandInfo206[] = { { AMDGPU::SReg_32_XM0_XEXECRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15549 static const MCOperandInfo OperandInfo207[] = { { AMDGPU::SReg_32_XM0_XEXECRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32_XM0_XEXECRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AMDGPU::SReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15552 static const MCOperandInfo OperandInfo210[] = { { AMDGPU::SReg_64_XEXECRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15553 static const MCOperandInfo OperandInfo211[] = { { AMDGPU::SReg_64_XEXECRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_64_XEXECRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AMDGPU::SReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15556 static const MCOperandInfo OperandInfo214[] = { { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15557 static const MCOperandInfo OperandInfo215[] = { { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AMDGPU::SReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15558 static const MCOperandInfo OperandInfo216[] = { { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_64RegClassID, 0, AMDGPU::OPERAND_REG_IMM_INT64, 0 }, };
15559 static const MCOperandInfo OperandInfo217[] = { { AMDGPU::SReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_IMM_INT32, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_IMM_INT32, 0 }, };
15559 static const MCOperandInfo OperandInfo217[] = { { AMDGPU::SReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_IMM_INT32, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_IMM_INT32, 0 }, };
15560 static const MCOperandInfo OperandInfo218[] = { { AMDGPU::SReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_IMM_INT32, 0 }, };
15561 static const MCOperandInfo OperandInfo219[] = { { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_IMM_INT32, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
15561 static const MCOperandInfo OperandInfo219[] = { { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_IMM_INT32, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
15561 static const MCOperandInfo OperandInfo219[] = { { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_IMM_INT32, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
15562 static const MCOperandInfo OperandInfo220[] = { { AMDGPU::SReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_IMM_INT32, 0 }, { AMDGPU::SReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
15565 static const MCOperandInfo OperandInfo223[] = { { AMDGPU::SReg_32_XM0_XEXECRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15566 static const MCOperandInfo OperandInfo224[] = { { AMDGPU::SReg_32_XM0_XEXECRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32_XM0_XEXECRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15569 static const MCOperandInfo OperandInfo227[] = { { AMDGPU::SReg_64_XEXECRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15570 static const MCOperandInfo OperandInfo228[] = { { AMDGPU::SReg_64_XEXECRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_64_XEXECRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15573 static const MCOperandInfo OperandInfo231[] = { { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15574 static const MCOperandInfo OperandInfo232[] = { { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15576 static const MCOperandInfo OperandInfo234[] = { { AMDGPU::SReg_512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15578 static const MCOperandInfo OperandInfo236[] = { { AMDGPU::SReg_64_XEXECRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15580 static const MCOperandInfo OperandInfo238[] = { { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15582 static const MCOperandInfo OperandInfo240[] = { { AMDGPU::SReg_256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15584 static const MCOperandInfo OperandInfo242[] = { { AMDGPU::SReg_32_XM0_XEXECRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15587 static const MCOperandInfo OperandInfo245[] = { { AMDGPU::SReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15591 static const MCOperandInfo OperandInfo249[] = { { AMDGPU::SReg_512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15593 static const MCOperandInfo OperandInfo251[] = { { AMDGPU::SReg_64_XEXECRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15595 static const MCOperandInfo OperandInfo253[] = { { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15597 static const MCOperandInfo OperandInfo255[] = { { AMDGPU::SReg_256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15599 static const MCOperandInfo OperandInfo257[] = { { AMDGPU::SReg_32_XM0_XEXECRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15601 static const MCOperandInfo OperandInfo259[] = { { AMDGPU::SReg_64RegClassID, 0, AMDGPU::OPERAND_REG_IMM_INT64, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_IMM_INT32, 0 }, };
15603 static const MCOperandInfo OperandInfo261[] = { { -1, 0, MCOI::OPERAND_PCREL, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15604 static const MCOperandInfo OperandInfo262[] = { { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15605 static const MCOperandInfo OperandInfo263[] = { { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15606 static const MCOperandInfo OperandInfo264[] = { { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15607 static const MCOperandInfo OperandInfo265[] = { { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15608 static const MCOperandInfo OperandInfo266[] = { { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15609 static const MCOperandInfo OperandInfo267[] = { { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15610 static const MCOperandInfo OperandInfo268[] = { { AMDGPU::VReg_96RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15611 static const MCOperandInfo OperandInfo269[] = { { AMDGPU::VReg_96RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15612 static const MCOperandInfo OperandInfo270[] = { { AMDGPU::VReg_96RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15613 static const MCOperandInfo OperandInfo271[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15614 static const MCOperandInfo OperandInfo272[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15615 static const MCOperandInfo OperandInfo273[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15763 static const MCOperandInfo OperandInfo421[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, AMDGPU::OPERAND_INPUT_MODS, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, AMDGPU::OPERAND_INPUT_MODS, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, AMDGPU::OPERAND_INPUT_MODS, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15763 static const MCOperandInfo OperandInfo421[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, AMDGPU::OPERAND_INPUT_MODS, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, AMDGPU::OPERAND_INPUT_MODS, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, AMDGPU::OPERAND_INPUT_MODS, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15770 static const MCOperandInfo OperandInfo428[] = { { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VRegOrLds_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, };
15770 static const MCOperandInfo OperandInfo428[] = { { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VRegOrLds_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, };
15774 static const MCOperandInfo OperandInfo432[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
15774 static const MCOperandInfo OperandInfo432[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
16047 static const MCOperandInfo OperandInfo705[] = { { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_IMM_INT32, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_IMM_INT32, 0 }, };
16047 static const MCOperandInfo OperandInfo705[] = { { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_IMM_INT32, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_IMM_INT32, 0 }, };
16048 static const MCOperandInfo OperandInfo706[] = { { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_IMM_INT32, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16048 static const MCOperandInfo OperandInfo706[] = { { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_IMM_INT32, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16048 static const MCOperandInfo OperandInfo706[] = { { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_IMM_INT32, 0 }, { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16049 static const MCOperandInfo OperandInfo707[] = { { AMDGPU::SReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_IMM_INT32, 0 }, { AMDGPU::SReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16058 static const MCOperandInfo OperandInfo716[] = { { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VRegOrLds_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16059 static const MCOperandInfo OperandInfo717[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SRegOrLds_32RegClassID, 0, AMDGPU::OPERAND_REG_IMM_INT32, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { AMDGPU::VS_32RegClassID, 0, AMDGPU::OPERAND_REG_IMM_INT32, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
gen/lib/Target/AMDGPU/AMDGPUGenRegisterBank.inc
   40     (1u << (AMDGPU::SReg_32RegClassID - 0)) |
   59     (1u << (AMDGPU::SReg_32RegClassID - 0)) |
  168     (1u << (AMDGPU::SReg_32RegClassID - 0)) |
gen/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc
11257   { SReg_32, SReg_32Bits, 289, 144, sizeof(SReg_32Bits), AMDGPU::SReg_32RegClassID, 1, true },
20504     &AMDGPUMCRegisterClasses[SReg_32RegClassID],
lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
  643     return AMDGPU::SReg_32RegClassID;
lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
  374     return isRegOrInlineNoMods(AMDGPU::SReg_32RegClassID, MVT::i16);
  382     return isRegOrInlineNoMods(AMDGPU::SReg_32RegClassID, MVT::i32);
  392     return isRegOrInlineNoMods(AMDGPU::SReg_32RegClassID, MVT::f16);
  400     return isRegOrInlineNoMods(AMDGPU::SReg_32RegClassID, MVT::f32);
lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
  958   const MCRegisterClass SGPRClass = TRI->getRegClass(AMDGPU::SReg_32RegClassID);
 1087   case AMDGPU::SReg_32RegClassID: