|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/ARM/ARMGenAsmMatcher.inc10791 { 687 /* mov */, ARM::MOVsr, Convert__Reg1_2__RegShiftedReg3_3__CondCode2_1__CCOut1_0, AMFBS_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_RegShiftedReg }, },
gen/lib/Target/ARM/ARMGenDAGISel.inc21729 /* 46675*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MOVsr), 0,
32829 /* 72263*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MOVsr), 0,
32957 /* 72544*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MOVsr), 0,
35373 /* 77993*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::MOVsr), 0,
gen/lib/Target/ARM/ARMGenMCCodeEmitter.inc15098 case ARM::MOVsr: {
lib/Target/ARM/ARMExpandPseudoInsts.cpp 1257 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVsr),
lib/Target/ARM/ARMFastISel.cpp 2775 unsigned Opc = ARM::MOVsr;
2794 if (Opc == ARM::MOVsr) {
2808 else if (Opc == ARM::MOVsr) {
lib/Target/ARM/ARMInstructionSelector.cpp 806 MIB->setDesc(TII.get(ARM::MOVsr));
lib/Target/ARM/AsmParser/ARMAsmParser.cpp 9631 TmpInst.setOpcode(ARM::MOVsr);
lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp 97 case ARM::MOVsr: {