reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/ARM/ARMGenAsmMatcher.inc

10626   { 544 /* ldr */, ARM::t2LDR_POST, Convert__Reg1_1__MemNoOffset1_2__Tie1_3_3__Imm1_3__CondCode2_0, AMFBS_IsThumb2, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset, MCK_Imm }, },

gen/lib/Target/ARM/ARMGenMCCodeEmitter.inc

 7409     case ARM::t2LDR_POST: {

lib/Target/ARM/ARMBaseInstrInfo.cpp

 3518   case ARM::t2LDR_POST:

lib/Target/ARM/ARMFrameLowering.cpp

  158        MI.getOpcode() == ARM::t2LDR_POST) &&
 1474   unsigned LdrOpc = AFI->isThumbFunction() ? ARM::t2LDR_POST :ARM::LDR_POST_IMM;
 2537       BuildMI(AllocMBB, DL, TII.get(ARM::t2LDR_POST))

lib/Target/ARM/ARMISelDAGToDAG.cpp

 1590       Opcode = isPre ? ARM::t2LDR_PRE : ARM::t2LDR_POST;

lib/Target/ARM/ARMISelLowering.cpp

 9897     return LdSize == 4 ? ARM::t2LDR_POST

lib/Target/ARM/ARMLoadStoreOptimizer.cpp

 1375     return ARM::t2LDR_POST;

lib/Target/ARM/AsmParser/ARMAsmParser.cpp

 7467   case ARM::t2LDR_POST:
 9692     TmpInst.setOpcode(ARM::t2LDR_POST);

lib/Target/ARM/Disassembler/ARMDisassembler.cpp

 4289     case ARM::t2LDR_POST:

lib/Target/ARM/Thumb2SizeReduction.cpp

  139   { ARM::t2LDR_POST,ARM::tLDMIA_UPD,0,         0,   0,   1,   0,  0,0, 0,1,0 },
  454   case ARM::t2LDR_POST: