|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/ARM/ARMGenAsmMatcher.inc10749 { 650 /* lsr */, ARM::t2LSRrr, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, AMFBS_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR }, },
10753 { 650 /* lsr */, ARM::t2LSRrr, Convert__Reg1_3__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, AMFBS_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR }, },
10756 { 650 /* lsr */, ARM::t2LSRrr, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, AMFBS_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, },
10760 { 650 /* lsr */, ARM::t2LSRrr, Convert__Reg1_3__Reg1_4__Reg1_5__CondCode2_1__CCOut1_0, AMFBS_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR, MCK_rGPR }, },
gen/lib/Target/ARM/ARMGenDAGISel.inc21793 /* 46827*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::t2LSRrr), 0,
gen/lib/Target/ARM/ARMGenFastISel.inc 4631 return fastEmitInst_rr(ARM::t2LSRrr, &ARM::rGPRRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/ARM/ARMGenGlobalISel.inc25106 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::t2LSRrr,
gen/lib/Target/ARM/ARMGenMCCodeEmitter.inc16012 case ARM::t2LSRrr:
lib/Target/ARM/ARMBaseInstrInfo.cpp 2889 case ARM::t2LSRrr:
lib/Target/ARM/AsmParser/ARMAsmParser.cpp 9543 case ARM_AM::lsr: newOpc = isNarrow ? ARM::tLSRrr : ARM::t2LSRrr; break;
10078 case ARM::t2LSRrr:
10093 case ARM::t2LSRrr: NewOpc = ARM::tLSRrr; break;
lib/Target/ARM/Thumb2SizeReduction.cpp 103 { ARM::t2LSRrr, 0, ARM::tLSRrr, 0, 0, 0, 1, 0,0, 1,0,1 },