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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenAsmMatcher.inc 9227 case ARM::Q4_Q5: OpKind = MCK_Reg66; break;
gen/lib/Target/ARM/ARMGenRegisterInfo.inc 2487 ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8, ARM::Q3_Q4, ARM::D7_D8_D9_D10, ARM::Q4_Q5, ARM::D9_D10_D11_D12, ARM::Q5_Q6, ARM::D11_D12_D13_D14, ARM::Q6_Q7, ARM::D13_D14_D15_D16, ARM::Q7_Q8, ARM::D15_D16_D17_D18, ARM::Q8_Q9, ARM::D17_D18_D19_D20, ARM::Q9_Q10, ARM::D19_D20_D21_D22, ARM::Q10_Q11, ARM::D21_D22_D23_D24, ARM::Q11_Q12, ARM::D23_D24_D25_D26, ARM::Q12_Q13, ARM::D25_D26_D27_D28, ARM::Q13_Q14, ARM::D27_D28_D29_D30, ARM::Q14_Q15,
2497 ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8, ARM::Q3_Q4, ARM::D7_D8_D9_D10, ARM::Q4_Q5, ARM::D9_D10_D11_D12, ARM::Q5_Q6, ARM::D11_D12_D13_D14, ARM::Q6_Q7, ARM::D13_D14_D15_D16, ARM::Q7_Q8, ARM::D15_D16_D17_D18,
2507 ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8, ARM::Q3_Q4, ARM::D7_D8_D9_D10, ARM::Q4_Q5, ARM::D9_D10_D11_D12, ARM::Q5_Q6, ARM::D11_D12_D13_D14, ARM::Q6_Q7, ARM::D13_D14_D15_D16, ARM::Q7_Q8,
2517 ARM::Q0_Q1, ARM::Q1_Q2, ARM::Q2_Q3, ARM::Q3_Q4, ARM::Q4_Q5, ARM::Q5_Q6, ARM::Q6_Q7, ARM::Q7_Q8, ARM::Q8_Q9, ARM::Q9_Q10, ARM::Q10_Q11, ARM::Q11_Q12, ARM::Q12_Q13, ARM::Q13_Q14, ARM::Q14_Q15,
2537 ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8, ARM::Q3_Q4, ARM::D7_D8_D9_D10, ARM::Q4_Q5, ARM::D9_D10_D11_D12, ARM::Q5_Q6, ARM::D11_D12_D13_D14, ARM::Q6_Q7, ARM::D13_D14_D15_D16,
2547 ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8, ARM::Q3_Q4, ARM::D7_D8_D9_D10, ARM::Q4_Q5, ARM::D9_D10_D11_D12, ARM::Q5_Q6, ARM::D11_D12_D13_D14, ARM::Q6_Q7,
2567 ARM::Q0_Q1, ARM::Q1_Q2, ARM::Q2_Q3, ARM::Q3_Q4, ARM::Q4_Q5, ARM::Q5_Q6, ARM::Q6_Q7, ARM::Q7_Q8,
2597 ARM::Q0_Q1, ARM::Q1_Q2, ARM::Q2_Q3, ARM::Q3_Q4, ARM::Q4_Q5, ARM::Q5_Q6, ARM::Q6_Q7,
6351 static const MCPhysReg AltOrder1[] = { ARM::Q8_Q9, ARM::Q9_Q10, ARM::Q10_Q11, ARM::Q11_Q12, ARM::Q12_Q13, ARM::Q13_Q14, ARM::Q14_Q15, ARM::Q0_Q1, ARM::Q1_Q2, ARM::Q2_Q3, ARM::Q3_Q4, ARM::Q4_Q5, ARM::Q5_Q6, ARM::Q6_Q7, ARM::Q7_Q8 };
6365 static const MCPhysReg AltOrder1[] = { ARM::Q0_Q1, ARM::Q1_Q2, ARM::Q2_Q3, ARM::Q3_Q4, ARM::Q4_Q5, ARM::Q5_Q6, ARM::Q6_Q7, ARM::Q7_Q8 };
6379 static const MCPhysReg AltOrder1[] = { ARM::Q0_Q1, ARM::Q1_Q2, ARM::Q2_Q3, ARM::Q3_Q4, ARM::Q4_Q5, ARM::Q5_Q6, ARM::Q6_Q7 };
lib/Target/ARM/Disassembler/ARMDisassembler.cpp 6088 ARM::Q4_Q5, ARM::Q5_Q6, ARM::Q6_Q7