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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenAsmMatcher.inc 9099 case ARM::S5: OpKind = MCK_SPR_8; break;
gen/lib/Target/ARM/ARMGenCallingConv.inc 302 ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15
559 ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15
772 ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15
925 ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15
gen/lib/Target/ARM/ARMGenRegisterInfo.inc 1501 { ARM::S5 },
1567 ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15, ARM::S16, ARM::S17, ARM::S18, ARM::S19, ARM::S20, ARM::S21, ARM::S22, ARM::S23, ARM::S24, ARM::S25, ARM::S26, ARM::S27, ARM::S28, ARM::S29, ARM::S30, ARM::S31,
1577 ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15, ARM::S16, ARM::S17, ARM::S18, ARM::S19, ARM::S20, ARM::S21, ARM::S22, ARM::S23, ARM::S24, ARM::S25, ARM::S26, ARM::S27, ARM::S28, ARM::S29, ARM::S30, ARM::S31, ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7, ARM::D8, ARM::D9, ARM::D10, ARM::D11, ARM::D12, ARM::D13, ARM::D14, ARM::D15, ARM::D16, ARM::D17, ARM::D18, ARM::D19, ARM::D20, ARM::D21, ARM::D22, ARM::D23, ARM::D24, ARM::D25, ARM::D26, ARM::D27, ARM::D28, ARM::D29, ARM::D30, ARM::D31, ARM::VPR,
1587 ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15, ARM::S16, ARM::S17, ARM::S18, ARM::S19, ARM::S20, ARM::S21, ARM::S22, ARM::S23, ARM::S24, ARM::S25, ARM::S26, ARM::S27, ARM::S28, ARM::S29, ARM::S30, ARM::S31,
1637 ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15,
5903 static const MCPhysReg AltOrder1[] = { ARM::S0, ARM::S2, ARM::S4, ARM::S6, ARM::S8, ARM::S10, ARM::S12, ARM::S14, ARM::S16, ARM::S18, ARM::S20, ARM::S22, ARM::S24, ARM::S26, ARM::S28, ARM::S30, ARM::S1, ARM::S3, ARM::S5, ARM::S7, ARM::S9, ARM::S11, ARM::S13, ARM::S15, ARM::S17, ARM::S19, ARM::S21, ARM::S23, ARM::S25, ARM::S27, ARM::S29, ARM::S31 };
5904 static const MCPhysReg AltOrder2[] = { ARM::S0, ARM::S4, ARM::S8, ARM::S12, ARM::S16, ARM::S20, ARM::S24, ARM::S28, ARM::S2, ARM::S6, ARM::S10, ARM::S14, ARM::S18, ARM::S22, ARM::S26, ARM::S30, ARM::S1, ARM::S5, ARM::S9, ARM::S13, ARM::S17, ARM::S21, ARM::S25, ARM::S29, ARM::S3, ARM::S7, ARM::S11, ARM::S15, ARM::S19, ARM::S23, ARM::S27, ARM::S31 };
5921 static const MCPhysReg AltOrder1[] = { ARM::S0, ARM::S2, ARM::S4, ARM::S6, ARM::S8, ARM::S10, ARM::S12, ARM::S14, ARM::S16, ARM::S18, ARM::S20, ARM::S22, ARM::S24, ARM::S26, ARM::S28, ARM::S30, ARM::S1, ARM::S3, ARM::S5, ARM::S7, ARM::S9, ARM::S11, ARM::S13, ARM::S15, ARM::S17, ARM::S19, ARM::S21, ARM::S23, ARM::S25, ARM::S27, ARM::S29, ARM::S31 };
5922 static const MCPhysReg AltOrder2[] = { ARM::S0, ARM::S4, ARM::S8, ARM::S12, ARM::S16, ARM::S20, ARM::S24, ARM::S28, ARM::S2, ARM::S6, ARM::S10, ARM::S14, ARM::S18, ARM::S22, ARM::S26, ARM::S30, ARM::S1, ARM::S5, ARM::S9, ARM::S13, ARM::S17, ARM::S21, ARM::S25, ARM::S29, ARM::S3, ARM::S7, ARM::S11, ARM::S15, ARM::S19, ARM::S23, ARM::S27, ARM::S31 };
lib/Target/ARM/ARMCallingConv.cpp 159 ARM::S4, ARM::S5, ARM::S6, ARM::S7,
lib/Target/ARM/Disassembler/ARMDisassembler.cpp 1280 ARM::S4, ARM::S5, ARM::S6, ARM::S7,