|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
lib/Target/ARM/ARMAsmPrinter.cpp 212 Reg = TRI->getSubReg(Reg, ARM::gsub_0);
312 Register Reg0 = TRI->getSubReg(RegBegin, ARM::gsub_0);
382 TRI->getSubReg(MO.getReg(), FirstHalf ? ARM::gsub_0 : ARM::gsub_1);
lib/Target/ARM/ARMBaseInstrInfo.cpp 901 BeginIdx = ARM::gsub_0;
1088 AddDReg(MIB, SrcReg, ARM::gsub_0, getKillRegState(isKill), TRI);
1099 AddDReg(MIB, SrcReg, ARM::gsub_0, getKillRegState(isKill), TRI);
1327 AddDReg(MIB, DestReg, ARM::gsub_0, RegState::DefineNoRead, TRI);
1338 MIB = AddDReg(MIB, DestReg, ARM::gsub_0, RegState::DefineNoRead, TRI);
lib/Target/ARM/ARMBaseRegisterInfo.cpp 295 return RI->getSubReg(*Supers, Odd ? ARM::gsub_1 : ARM::gsub_0);
lib/Target/ARM/ARMExpandPseudoInsts.cpp 1039 Register RegLo = TRI->getSubReg(Reg.getReg(), ARM::gsub_0);
1064 Register DestLo = TRI->getSubReg(Dest.getReg(), ARM::gsub_0);
1066 Register DesiredLo = TRI->getSubReg(DesiredReg, ARM::gsub_0);
lib/Target/ARM/ARMISelDAGToDAG.cpp 1693 SDValue SubReg0 = CurDAG->getTargetConstant(ARM::gsub_0, dl, MVT::i32);
3871 CurDAG->getTargetConstant(ARM::gsub_0, dl, MVT::i32);
4728 SDValue Sub0 = CurDAG->getTargetExtractSubreg(ARM::gsub_0, dl, MVT::i32,
lib/Target/ARM/ARMISelLowering.cpp 9062 SDValue SubReg0 = DAG.getTargetConstant(ARM::gsub_0, dl, MVT::i32);
9088 DAG.getTargetExtractSubreg(isBigEndian ? ARM::gsub_1 : ARM::gsub_0,
9091 DAG.getTargetExtractSubreg(isBigEndian ? ARM::gsub_0 : ARM::gsub_1,
lib/Target/ARM/AsmParser/ARMAsmParser.cpp 7118 Reg1, ARM::gsub_0, &(MRI->getRegClass(ARM::GPRPairRegClassID)));
lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp 272 Reg, ARM::gsub_0, &MRI.getRegClass(ARM::GPRPairRegClassID)));
829 printRegName(O, MRI.getSubReg(Reg, ARM::gsub_0));
lib/Target/ARM/Thumb2InstrInfo.cpp 168 AddDReg(MIB, SrcReg, ARM::gsub_0, getKillRegState(isKill), TRI);
209 AddDReg(MIB, DestReg, ARM::gsub_0, RegState::DefineNoRead, TRI);