|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/Hexagon/HexagonGenDisassemblerTables.inc 8550 tmp = 0x0;
8551 tmp |= fieldFromInstruction(insn, 0, 14) << 6;
8552 tmp |= fieldFromInstruction(insn, 16, 12) << 20;
8553 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8556 tmp = fieldFromInstruction(insn, 16, 4);
8557 if (DecodeGeneralSubRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8558 tmp = fieldFromInstruction(insn, 8, 5);
8559 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8560 tmp = 0x0;
8561 tmp |= fieldFromInstruction(insn, 1, 7) << 2;
8562 tmp |= fieldFromInstruction(insn, 20, 2) << 9;
8563 if (brtargetDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8566 tmp = fieldFromInstruction(insn, 16, 4);
8567 if (DecodeGeneralSubRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8568 tmp = 0x0;
8569 tmp |= fieldFromInstruction(insn, 1, 7) << 2;
8570 tmp |= fieldFromInstruction(insn, 20, 2) << 9;
8571 if (brtargetDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8574 tmp = fieldFromInstruction(insn, 16, 4);
8575 if (DecodeGeneralSubRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8576 tmp = fieldFromInstruction(insn, 8, 4);
8577 if (DecodeGeneralSubRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8578 tmp = 0x0;
8579 tmp |= fieldFromInstruction(insn, 1, 7) << 2;
8580 tmp |= fieldFromInstruction(insn, 20, 2) << 9;
8581 if (brtargetDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8584 tmp = fieldFromInstruction(insn, 16, 4);
8585 if (DecodeGeneralSubRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8586 tmp = fieldFromInstruction(insn, 8, 6);
8587 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8588 tmp = 0x0;
8589 tmp |= fieldFromInstruction(insn, 1, 7) << 2;
8590 tmp |= fieldFromInstruction(insn, 20, 2) << 9;
8591 if (brtargetDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8594 tmp = fieldFromInstruction(insn, 8, 4);
8595 if (DecodeGeneralSubRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8596 tmp = fieldFromInstruction(insn, 16, 4);
8597 if (DecodeGeneralSubRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8598 tmp = 0x0;
8599 tmp |= fieldFromInstruction(insn, 1, 7) << 2;
8600 tmp |= fieldFromInstruction(insn, 20, 2) << 9;
8601 if (brtargetDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8604 tmp = fieldFromInstruction(insn, 16, 3);
8605 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8606 tmp = fieldFromInstruction(insn, 8, 5);
8607 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8608 tmp = 0x0;
8609 tmp |= fieldFromInstruction(insn, 1, 7) << 2;
8610 tmp |= fieldFromInstruction(insn, 20, 2) << 9;
8611 if (brtargetDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8614 tmp = fieldFromInstruction(insn, 8, 5);
8615 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8616 tmp = fieldFromInstruction(insn, 16, 3);
8617 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8618 tmp = 0x0;
8619 tmp |= fieldFromInstruction(insn, 1, 7) << 2;
8620 tmp |= fieldFromInstruction(insn, 20, 2) << 9;
8621 if (brtargetDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8624 tmp = fieldFromInstruction(insn, 16, 3);
8625 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8626 tmp = fieldFromInstruction(insn, 8, 5);
8627 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8628 tmp = 0x0;
8629 tmp |= fieldFromInstruction(insn, 1, 7) << 2;
8630 tmp |= fieldFromInstruction(insn, 20, 2) << 9;
8631 if (brtargetDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8634 tmp = fieldFromInstruction(insn, 16, 3);
8635 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8636 tmp = 0x0;
8637 tmp |= fieldFromInstruction(insn, 1, 7) << 2;
8638 tmp |= fieldFromInstruction(insn, 20, 2) << 9;
8639 if (brtargetDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8642 tmp = fieldFromInstruction(insn, 0, 5);
8643 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8644 tmp = fieldFromInstruction(insn, 5, 2);
8645 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8646 tmp = fieldFromInstruction(insn, 16, 5);
8647 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8648 tmp = fieldFromInstruction(insn, 8, 5);
8649 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8650 tmp = 0x0;
8651 tmp |= fieldFromInstruction(insn, 7, 1) << 0;
8652 tmp |= fieldFromInstruction(insn, 13, 1) << 1;
8653 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8656 tmp = fieldFromInstruction(insn, 0, 5);
8657 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8658 tmp = fieldFromInstruction(insn, 5, 2);
8659 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8660 tmp = fieldFromInstruction(insn, 16, 5);
8661 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8662 tmp = fieldFromInstruction(insn, 8, 5);
8663 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8664 tmp = 0x0;
8665 tmp |= fieldFromInstruction(insn, 7, 1) << 0;
8666 tmp |= fieldFromInstruction(insn, 13, 1) << 1;
8667 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8670 tmp = fieldFromInstruction(insn, 5, 2);
8671 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8672 tmp = fieldFromInstruction(insn, 16, 5);
8673 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8674 tmp = fieldFromInstruction(insn, 8, 5);
8675 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8676 tmp = 0x0;
8677 tmp |= fieldFromInstruction(insn, 7, 1) << 0;
8678 tmp |= fieldFromInstruction(insn, 13, 1) << 1;
8679 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8680 tmp = fieldFromInstruction(insn, 0, 5);
8681 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8684 tmp = fieldFromInstruction(insn, 5, 2);
8685 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8686 tmp = fieldFromInstruction(insn, 16, 5);
8687 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8688 tmp = fieldFromInstruction(insn, 8, 5);
8689 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8690 tmp = 0x0;
8691 tmp |= fieldFromInstruction(insn, 7, 1) << 0;
8692 tmp |= fieldFromInstruction(insn, 13, 1) << 1;
8693 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8694 tmp = fieldFromInstruction(insn, 0, 3);
8695 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8698 tmp = fieldFromInstruction(insn, 5, 2);
8699 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8700 tmp = fieldFromInstruction(insn, 16, 5);
8701 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8702 tmp = fieldFromInstruction(insn, 8, 5);
8703 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8704 tmp = 0x0;
8705 tmp |= fieldFromInstruction(insn, 7, 1) << 0;
8706 tmp |= fieldFromInstruction(insn, 13, 1) << 1;
8707 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8708 tmp = fieldFromInstruction(insn, 0, 5);
8709 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8712 tmp = fieldFromInstruction(insn, 5, 2);
8713 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8714 tmp = fieldFromInstruction(insn, 16, 5);
8715 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8716 tmp = fieldFromInstruction(insn, 7, 6);
8717 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8718 tmp = 0x0;
8719 tmp |= fieldFromInstruction(insn, 0, 5) << 0;
8720 tmp |= fieldFromInstruction(insn, 13, 1) << 5;
8721 if (s32_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8724 tmp = fieldFromInstruction(insn, 5, 2);
8725 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8726 tmp = fieldFromInstruction(insn, 16, 5);
8727 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8728 tmp = fieldFromInstruction(insn, 7, 6) << 1;
8729 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8730 tmp = 0x0;
8731 tmp |= fieldFromInstruction(insn, 0, 5) << 0;
8732 tmp |= fieldFromInstruction(insn, 13, 1) << 5;
8733 if (s32_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8736 tmp = fieldFromInstruction(insn, 5, 2);
8737 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8738 tmp = fieldFromInstruction(insn, 16, 5);
8739 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8740 tmp = fieldFromInstruction(insn, 7, 6) << 2;
8741 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8742 tmp = 0x0;
8743 tmp |= fieldFromInstruction(insn, 0, 5) << 0;
8744 tmp |= fieldFromInstruction(insn, 13, 1) << 5;
8745 if (s32_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8748 tmp = fieldFromInstruction(insn, 0, 5);
8749 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8750 tmp = fieldFromInstruction(insn, 16, 5);
8751 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8752 tmp = fieldFromInstruction(insn, 8, 5);
8753 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8754 tmp = 0x0;
8755 tmp |= fieldFromInstruction(insn, 7, 1) << 0;
8756 tmp |= fieldFromInstruction(insn, 13, 1) << 1;
8757 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8760 tmp = fieldFromInstruction(insn, 0, 5);
8761 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8762 tmp = fieldFromInstruction(insn, 16, 5);
8763 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8764 tmp = fieldFromInstruction(insn, 8, 5);
8765 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8766 tmp = 0x0;
8767 tmp |= fieldFromInstruction(insn, 7, 1) << 0;
8768 tmp |= fieldFromInstruction(insn, 13, 1) << 1;
8769 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8772 tmp = fieldFromInstruction(insn, 16, 5);
8773 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8774 tmp = fieldFromInstruction(insn, 8, 5);
8775 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8776 tmp = 0x0;
8777 tmp |= fieldFromInstruction(insn, 7, 1) << 0;
8778 tmp |= fieldFromInstruction(insn, 13, 1) << 1;
8779 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8780 tmp = fieldFromInstruction(insn, 0, 5);
8781 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8784 tmp = fieldFromInstruction(insn, 16, 5);
8785 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8786 tmp = fieldFromInstruction(insn, 8, 5);
8787 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8788 tmp = 0x0;
8789 tmp |= fieldFromInstruction(insn, 7, 1) << 0;
8790 tmp |= fieldFromInstruction(insn, 13, 1) << 1;
8791 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8792 tmp = fieldFromInstruction(insn, 0, 3);
8793 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8796 tmp = fieldFromInstruction(insn, 16, 5);
8797 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8798 tmp = fieldFromInstruction(insn, 8, 5);
8799 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8800 tmp = 0x0;
8801 tmp |= fieldFromInstruction(insn, 7, 1) << 0;
8802 tmp |= fieldFromInstruction(insn, 13, 1) << 1;
8803 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8804 tmp = fieldFromInstruction(insn, 0, 5);
8805 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8808 tmp = fieldFromInstruction(insn, 16, 5);
8809 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8810 tmp = fieldFromInstruction(insn, 7, 6);
8811 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8812 tmp = 0x0;
8813 tmp |= fieldFromInstruction(insn, 0, 7) << 0;
8814 tmp |= fieldFromInstruction(insn, 13, 1) << 7;
8815 if (s32_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8818 tmp = fieldFromInstruction(insn, 16, 5);
8819 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8820 tmp = fieldFromInstruction(insn, 7, 6) << 1;
8821 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8822 tmp = 0x0;
8823 tmp |= fieldFromInstruction(insn, 0, 7) << 0;
8824 tmp |= fieldFromInstruction(insn, 13, 1) << 7;
8825 if (s32_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8828 tmp = fieldFromInstruction(insn, 16, 5);
8829 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8830 tmp = fieldFromInstruction(insn, 7, 6) << 2;
8831 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8832 tmp = 0x0;
8833 tmp |= fieldFromInstruction(insn, 0, 7) << 0;
8834 tmp |= fieldFromInstruction(insn, 13, 1) << 7;
8835 if (s32_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8838 tmp = fieldFromInstruction(insn, 16, 5);
8839 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8840 tmp = fieldFromInstruction(insn, 7, 6);
8841 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8842 tmp = fieldFromInstruction(insn, 0, 5);
8843 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8846 tmp = fieldFromInstruction(insn, 16, 5);
8847 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8848 tmp = fieldFromInstruction(insn, 7, 6) << 1;
8849 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8850 tmp = fieldFromInstruction(insn, 0, 5);
8851 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8854 tmp = fieldFromInstruction(insn, 16, 5);
8855 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8856 tmp = fieldFromInstruction(insn, 7, 6) << 2;
8857 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8858 tmp = fieldFromInstruction(insn, 0, 5);
8859 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8862 tmp = fieldFromInstruction(insn, 16, 5);
8863 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8864 tmp = fieldFromInstruction(insn, 7, 6);
8865 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8866 tmp = fieldFromInstruction(insn, 0, 5);
8867 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8870 tmp = fieldFromInstruction(insn, 16, 5);
8871 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8872 tmp = fieldFromInstruction(insn, 7, 6) << 1;
8873 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8874 tmp = fieldFromInstruction(insn, 0, 5);
8875 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8878 tmp = fieldFromInstruction(insn, 16, 5);
8879 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8880 tmp = fieldFromInstruction(insn, 7, 6) << 2;
8881 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8882 tmp = fieldFromInstruction(insn, 0, 5);
8883 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8886 tmp = fieldFromInstruction(insn, 0, 2);
8887 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8888 tmp = fieldFromInstruction(insn, 16, 5);
8889 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8890 tmp = 0x0;
8891 tmp |= fieldFromInstruction(insn, 3, 5) << 0;
8892 tmp |= fieldFromInstruction(insn, 13, 1) << 5;
8893 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8894 tmp = fieldFromInstruction(insn, 8, 5);
8895 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8898 tmp = 0x0;
8899 tmp |= fieldFromInstruction(insn, 0, 8) << 0;
8900 tmp |= fieldFromInstruction(insn, 13, 1) << 8;
8901 tmp |= fieldFromInstruction(insn, 16, 5) << 9;
8902 tmp |= fieldFromInstruction(insn, 25, 2) << 14;
8903 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8904 tmp = fieldFromInstruction(insn, 8, 5);
8905 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8908 tmp = fieldFromInstruction(insn, 0, 2);
8909 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8910 tmp = fieldFromInstruction(insn, 16, 5);
8911 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8912 tmp = 0x0;
8913 tmp |= fieldFromInstruction(insn, 3, 5) << 1;
8914 tmp |= fieldFromInstruction(insn, 13, 1) << 6;
8915 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8916 tmp = fieldFromInstruction(insn, 8, 5);
8917 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8920 tmp = 0x0;
8921 tmp |= fieldFromInstruction(insn, 0, 8) << 1;
8922 tmp |= fieldFromInstruction(insn, 13, 1) << 9;
8923 tmp |= fieldFromInstruction(insn, 16, 5) << 10;
8924 tmp |= fieldFromInstruction(insn, 25, 2) << 15;
8925 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8926 tmp = fieldFromInstruction(insn, 8, 5);
8927 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8930 tmp = fieldFromInstruction(insn, 0, 2);
8931 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8932 tmp = fieldFromInstruction(insn, 16, 5);
8933 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8934 tmp = 0x0;
8935 tmp |= fieldFromInstruction(insn, 3, 5) << 2;
8936 tmp |= fieldFromInstruction(insn, 13, 1) << 7;
8937 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8938 tmp = fieldFromInstruction(insn, 8, 5);
8939 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8942 tmp = 0x0;
8943 tmp |= fieldFromInstruction(insn, 0, 8) << 2;
8944 tmp |= fieldFromInstruction(insn, 13, 1) << 10;
8945 tmp |= fieldFromInstruction(insn, 16, 5) << 11;
8946 tmp |= fieldFromInstruction(insn, 25, 2) << 16;
8947 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8948 tmp = fieldFromInstruction(insn, 8, 5);
8949 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8952 tmp = fieldFromInstruction(insn, 0, 2);
8953 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8954 tmp = fieldFromInstruction(insn, 16, 5);
8955 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8956 tmp = 0x0;
8957 tmp |= fieldFromInstruction(insn, 3, 5) << 0;
8958 tmp |= fieldFromInstruction(insn, 13, 1) << 5;
8959 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8960 tmp = fieldFromInstruction(insn, 8, 3);
8961 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8964 tmp = 0x0;
8965 tmp |= fieldFromInstruction(insn, 0, 8) << 0;
8966 tmp |= fieldFromInstruction(insn, 13, 1) << 8;
8967 tmp |= fieldFromInstruction(insn, 16, 5) << 9;
8968 tmp |= fieldFromInstruction(insn, 25, 2) << 14;
8969 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8970 tmp = fieldFromInstruction(insn, 8, 3);
8971 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8974 tmp = fieldFromInstruction(insn, 0, 2);
8975 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8976 tmp = fieldFromInstruction(insn, 16, 5);
8977 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8978 tmp = 0x0;
8979 tmp |= fieldFromInstruction(insn, 3, 5) << 1;
8980 tmp |= fieldFromInstruction(insn, 13, 1) << 6;
8981 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8982 tmp = fieldFromInstruction(insn, 8, 3);
8983 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8986 tmp = 0x0;
8987 tmp |= fieldFromInstruction(insn, 0, 8) << 1;
8988 tmp |= fieldFromInstruction(insn, 13, 1) << 9;
8989 tmp |= fieldFromInstruction(insn, 16, 5) << 10;
8990 tmp |= fieldFromInstruction(insn, 25, 2) << 15;
8991 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8992 tmp = fieldFromInstruction(insn, 8, 3);
8993 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8996 tmp = fieldFromInstruction(insn, 0, 2);
8997 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
8998 tmp = fieldFromInstruction(insn, 16, 5);
8999 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9000 tmp = 0x0;
9001 tmp |= fieldFromInstruction(insn, 3, 5) << 2;
9002 tmp |= fieldFromInstruction(insn, 13, 1) << 7;
9003 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9004 tmp = fieldFromInstruction(insn, 8, 3);
9005 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9008 tmp = 0x0;
9009 tmp |= fieldFromInstruction(insn, 0, 8) << 2;
9010 tmp |= fieldFromInstruction(insn, 13, 1) << 10;
9011 tmp |= fieldFromInstruction(insn, 16, 5) << 11;
9012 tmp |= fieldFromInstruction(insn, 25, 2) << 16;
9013 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9014 tmp = fieldFromInstruction(insn, 8, 3);
9015 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9018 tmp = fieldFromInstruction(insn, 0, 2);
9019 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9020 tmp = fieldFromInstruction(insn, 16, 5);
9021 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9022 tmp = 0x0;
9023 tmp |= fieldFromInstruction(insn, 3, 5) << 3;
9024 tmp |= fieldFromInstruction(insn, 13, 1) << 8;
9025 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9026 tmp = fieldFromInstruction(insn, 8, 5);
9027 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9030 tmp = 0x0;
9031 tmp |= fieldFromInstruction(insn, 0, 8) << 3;
9032 tmp |= fieldFromInstruction(insn, 13, 1) << 11;
9033 tmp |= fieldFromInstruction(insn, 16, 5) << 12;
9034 tmp |= fieldFromInstruction(insn, 25, 2) << 17;
9035 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9036 tmp = fieldFromInstruction(insn, 8, 5);
9037 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9040 tmp = fieldFromInstruction(insn, 0, 5);
9041 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9042 tmp = fieldFromInstruction(insn, 11, 2);
9043 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9044 tmp = fieldFromInstruction(insn, 16, 5);
9045 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9046 tmp = fieldFromInstruction(insn, 5, 6);
9047 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9050 tmp = fieldFromInstruction(insn, 0, 5);
9051 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9052 tmp = 0x0;
9053 tmp |= fieldFromInstruction(insn, 5, 9) << 0;
9054 tmp |= fieldFromInstruction(insn, 16, 5) << 9;
9055 tmp |= fieldFromInstruction(insn, 25, 2) << 14;
9056 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9059 tmp = fieldFromInstruction(insn, 0, 5);
9060 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9061 tmp = fieldFromInstruction(insn, 11, 2);
9062 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9063 tmp = fieldFromInstruction(insn, 16, 5);
9064 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9065 tmp = fieldFromInstruction(insn, 5, 6) << 1;
9066 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9069 tmp = fieldFromInstruction(insn, 0, 5);
9070 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9071 tmp = 0x0;
9072 tmp |= fieldFromInstruction(insn, 5, 9) << 1;
9073 tmp |= fieldFromInstruction(insn, 16, 5) << 10;
9074 tmp |= fieldFromInstruction(insn, 25, 2) << 15;
9075 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9078 tmp = fieldFromInstruction(insn, 0, 5);
9079 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9080 tmp = fieldFromInstruction(insn, 11, 2);
9081 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9082 tmp = fieldFromInstruction(insn, 16, 5);
9083 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9084 tmp = fieldFromInstruction(insn, 5, 6) << 2;
9085 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9088 tmp = fieldFromInstruction(insn, 0, 5);
9089 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9090 tmp = 0x0;
9091 tmp |= fieldFromInstruction(insn, 5, 9) << 2;
9092 tmp |= fieldFromInstruction(insn, 16, 5) << 11;
9093 tmp |= fieldFromInstruction(insn, 25, 2) << 16;
9094 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9097 tmp = fieldFromInstruction(insn, 0, 5);
9098 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9099 tmp = fieldFromInstruction(insn, 11, 2);
9100 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9101 tmp = fieldFromInstruction(insn, 16, 5);
9102 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9103 tmp = fieldFromInstruction(insn, 5, 6) << 3;
9104 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9107 tmp = fieldFromInstruction(insn, 0, 5);
9108 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9109 tmp = 0x0;
9110 tmp |= fieldFromInstruction(insn, 5, 9) << 3;
9111 tmp |= fieldFromInstruction(insn, 16, 5) << 12;
9112 tmp |= fieldFromInstruction(insn, 25, 2) << 17;
9113 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9116 tmp = fieldFromInstruction(insn, 16, 5);
9117 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9120 tmp = fieldFromInstruction(insn, 8, 2);
9121 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9122 tmp = fieldFromInstruction(insn, 16, 5);
9123 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9126 tmp = 0x0;
9127 tmp |= fieldFromInstruction(insn, 2, 3) << 0;
9128 tmp |= fieldFromInstruction(insn, 8, 5) << 3;
9129 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9132 tmp = fieldFromInstruction(insn, 16, 5);
9133 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9134 tmp = fieldFromInstruction(insn, 16, 5);
9135 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9136 tmp = 0x0;
9137 tmp |= fieldFromInstruction(insn, 2, 3) << 0;
9138 tmp |= fieldFromInstruction(insn, 8, 5) << 3;
9139 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9144 tmp = 0x0;
9145 tmp |= fieldFromInstruction(insn, 1, 13) << 2;
9146 tmp |= fieldFromInstruction(insn, 16, 9) << 15;
9147 if (brtargetDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9150 tmp = fieldFromInstruction(insn, 8, 2);
9151 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9152 tmp = 0x0;
9153 tmp |= fieldFromInstruction(insn, 1, 7) << 2;
9154 tmp |= fieldFromInstruction(insn, 13, 1) << 9;
9155 tmp |= fieldFromInstruction(insn, 16, 5) << 10;
9156 tmp |= fieldFromInstruction(insn, 22, 2) << 15;
9157 if (brtargetDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9160 tmp = 0x0;
9161 tmp |= fieldFromInstruction(insn, 3, 2) << 2;
9162 tmp |= fieldFromInstruction(insn, 8, 5) << 4;
9163 if (brtargetDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9164 tmp = fieldFromInstruction(insn, 16, 5);
9165 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9168 tmp = fieldFromInstruction(insn, 16, 5);
9169 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9170 tmp = 0x0;
9171 tmp |= fieldFromInstruction(insn, 1, 11) << 2;
9172 tmp |= fieldFromInstruction(insn, 13, 1) << 13;
9173 tmp |= fieldFromInstruction(insn, 21, 1) << 14;
9174 if (brtargetDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9177 tmp = fieldFromInstruction(insn, 0, 5);
9178 if (DecodeGuestRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9179 tmp = fieldFromInstruction(insn, 16, 5);
9180 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9183 tmp = fieldFromInstruction(insn, 0, 5);
9184 if (DecodeCtrRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9185 tmp = fieldFromInstruction(insn, 16, 5);
9186 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9189 tmp = fieldFromInstruction(insn, 0, 5);
9190 if (DecodeGuestRegs64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9191 tmp = fieldFromInstruction(insn, 16, 5);
9192 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9195 tmp = fieldFromInstruction(insn, 0, 5);
9196 if (DecodeCtrRegs64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9197 tmp = fieldFromInstruction(insn, 16, 5);
9198 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9201 tmp = fieldFromInstruction(insn, 0, 5);
9202 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9203 tmp = fieldFromInstruction(insn, 16, 5);
9204 if (DecodeCtrRegs64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9207 tmp = fieldFromInstruction(insn, 0, 5);
9208 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9209 tmp = fieldFromInstruction(insn, 16, 5);
9210 if (DecodeGuestRegs64RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9213 tmp = 0x0;
9214 tmp |= fieldFromInstruction(insn, 3, 2) << 2;
9215 tmp |= fieldFromInstruction(insn, 8, 5) << 4;
9216 if (brtargetDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9217 tmp = 0x0;
9218 tmp |= fieldFromInstruction(insn, 0, 2) << 0;
9219 tmp |= fieldFromInstruction(insn, 5, 3) << 2;
9220 tmp |= fieldFromInstruction(insn, 16, 5) << 5;
9221 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9224 tmp = fieldFromInstruction(insn, 0, 5);
9225 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9226 tmp = fieldFromInstruction(insn, 16, 5);
9227 if (DecodeCtrRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9230 tmp = fieldFromInstruction(insn, 0, 5);
9231 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9232 tmp = fieldFromInstruction(insn, 16, 5);
9233 if (DecodeGuestRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9236 tmp = fieldFromInstruction(insn, 0, 5);
9237 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9238 tmp = fieldFromInstruction(insn, 7, 6);
9239 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9242 tmp = fieldFromInstruction(insn, 0, 2);
9243 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9244 tmp = fieldFromInstruction(insn, 8, 2);
9245 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9246 tmp = fieldFromInstruction(insn, 16, 2);
9247 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9250 tmp = fieldFromInstruction(insn, 0, 2);
9251 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9252 tmp = fieldFromInstruction(insn, 16, 2);
9253 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9254 tmp = fieldFromInstruction(insn, 8, 2);
9255 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9258 tmp = fieldFromInstruction(insn, 0, 2);
9259 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9260 tmp = fieldFromInstruction(insn, 16, 2);
9261 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9262 tmp = fieldFromInstruction(insn, 8, 2);
9263 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9264 tmp = fieldFromInstruction(insn, 6, 2);
9265 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9268 tmp = fieldFromInstruction(insn, 0, 2);
9269 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9270 tmp = fieldFromInstruction(insn, 16, 2);
9271 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9274 tmp = fieldFromInstruction(insn, 0, 5);
9275 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9276 tmp = fieldFromInstruction(insn, 16, 5);
9277 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9280 tmp = fieldFromInstruction(insn, 0, 5);
9281 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9282 tmp = fieldFromInstruction(insn, 8, 2);
9283 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9284 tmp = fieldFromInstruction(insn, 16, 5);
9285 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9288 tmp = fieldFromInstruction(insn, 16, 5);
9289 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9290 tmp = fieldFromInstruction(insn, 16, 5);
9291 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9292 tmp = 0x0;
9293 tmp |= fieldFromInstruction(insn, 0, 14) << 0;
9294 tmp |= fieldFromInstruction(insn, 22, 2) << 14;
9295 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9298 tmp = fieldFromInstruction(insn, 0, 5);
9299 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9300 tmp = fieldFromInstruction(insn, 21, 2);
9301 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9302 tmp = fieldFromInstruction(insn, 16, 5);
9303 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9304 tmp = fieldFromInstruction(insn, 5, 8);
9305 if (s32_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9308 tmp = fieldFromInstruction(insn, 0, 5);
9309 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9310 tmp = fieldFromInstruction(insn, 21, 2);
9311 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9312 tmp = fieldFromInstruction(insn, 5, 8);
9313 if (s32_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9314 tmp = fieldFromInstruction(insn, 16, 5);
9315 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9318 tmp = fieldFromInstruction(insn, 0, 5);
9319 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9320 tmp = fieldFromInstruction(insn, 16, 5);
9321 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9322 tmp = fieldFromInstruction(insn, 5, 8);
9323 if (s32_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9326 tmp = fieldFromInstruction(insn, 0, 5);
9327 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9328 tmp = fieldFromInstruction(insn, 5, 8);
9329 if (s32_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9330 tmp = fieldFromInstruction(insn, 16, 5);
9331 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9334 tmp = fieldFromInstruction(insn, 0, 5);
9335 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9336 tmp = fieldFromInstruction(insn, 16, 5);
9337 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9338 tmp = fieldFromInstruction(insn, 5, 8);
9339 if (s32_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9342 tmp = fieldFromInstruction(insn, 0, 2);
9343 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9344 tmp = fieldFromInstruction(insn, 16, 5);
9345 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9346 tmp = 0x0;
9347 tmp |= fieldFromInstruction(insn, 5, 9) << 0;
9348 tmp |= fieldFromInstruction(insn, 21, 1) << 9;
9349 if (s32_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9352 tmp = fieldFromInstruction(insn, 0, 2);
9353 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9354 tmp = fieldFromInstruction(insn, 16, 5);
9355 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9356 tmp = fieldFromInstruction(insn, 5, 9);
9357 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9360 tmp = fieldFromInstruction(insn, 0, 5);
9361 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9362 tmp = fieldFromInstruction(insn, 16, 5);
9363 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9364 tmp = 0x0;
9365 tmp |= fieldFromInstruction(insn, 5, 9) << 0;
9366 tmp |= fieldFromInstruction(insn, 21, 1) << 9;
9367 if (s32_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9370 tmp = fieldFromInstruction(insn, 0, 5);
9371 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9372 tmp = 0x0;
9373 tmp |= fieldFromInstruction(insn, 5, 9) << 0;
9374 tmp |= fieldFromInstruction(insn, 21, 1) << 9;
9375 if (s32_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9376 tmp = fieldFromInstruction(insn, 16, 5);
9377 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9380 tmp = fieldFromInstruction(insn, 0, 5);
9381 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9382 tmp = 0x0;
9383 tmp |= fieldFromInstruction(insn, 5, 9) << 0;
9384 tmp |= fieldFromInstruction(insn, 16, 5) << 9;
9385 tmp |= fieldFromInstruction(insn, 22, 2) << 14;
9386 if (s32_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9389 tmp = fieldFromInstruction(insn, 0, 5);
9390 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9391 tmp = fieldFromInstruction(insn, 23, 2);
9392 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9393 tmp = fieldFromInstruction(insn, 5, 8);
9394 if (s32_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9395 tmp = 0x0;
9396 tmp |= fieldFromInstruction(insn, 13, 1) << 0;
9397 tmp |= fieldFromInstruction(insn, 16, 7) << 1;
9398 if (s8_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9401 tmp = fieldFromInstruction(insn, 0, 5);
9402 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9403 tmp = fieldFromInstruction(insn, 5, 8);
9404 if (s32_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9405 tmp = 0x0;
9406 tmp |= fieldFromInstruction(insn, 13, 1) << 0;
9407 tmp |= fieldFromInstruction(insn, 16, 7) << 1;
9408 if (s8_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9411 tmp = fieldFromInstruction(insn, 0, 5);
9412 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9413 tmp = fieldFromInstruction(insn, 5, 8);
9414 if (s8_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9415 tmp = 0x0;
9416 tmp |= fieldFromInstruction(insn, 13, 1) << 0;
9417 tmp |= fieldFromInstruction(insn, 16, 5) << 1;
9418 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9421 tmp = fieldFromInstruction(insn, 0, 5);
9422 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9423 tmp = fieldFromInstruction(insn, 21, 2);
9424 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9425 tmp = 0x0;
9426 tmp |= fieldFromInstruction(insn, 5, 8) << 0;
9427 tmp |= fieldFromInstruction(insn, 16, 4) << 8;
9428 if (s32_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9431 tmp = fieldFromInstruction(insn, 0, 5);
9432 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9433 tmp = fieldFromInstruction(insn, 16, 5);
9434 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9435 tmp = fieldFromInstruction(insn, 8, 6);
9436 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9439 tmp = fieldFromInstruction(insn, 0, 5);
9440 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9441 tmp = fieldFromInstruction(insn, 16, 5);
9442 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9443 tmp = fieldFromInstruction(insn, 8, 4);
9444 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9447 tmp = fieldFromInstruction(insn, 0, 5);
9448 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9449 tmp = fieldFromInstruction(insn, 16, 5);
9450 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9451 tmp = fieldFromInstruction(insn, 8, 5);
9452 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9455 tmp = fieldFromInstruction(insn, 0, 5);
9456 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9457 tmp = fieldFromInstruction(insn, 16, 5);
9458 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9461 tmp = fieldFromInstruction(insn, 0, 5);
9462 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9463 tmp = fieldFromInstruction(insn, 16, 5);
9464 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9465 tmp = fieldFromInstruction(insn, 8, 6);
9466 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9467 tmp = 0x0;
9468 tmp |= fieldFromInstruction(insn, 5, 3) << 0;
9469 tmp |= fieldFromInstruction(insn, 21, 3) << 3;
9470 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9473 tmp = fieldFromInstruction(insn, 0, 5);
9474 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9475 tmp = fieldFromInstruction(insn, 0, 5);
9476 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9477 tmp = fieldFromInstruction(insn, 16, 5);
9478 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9479 tmp = fieldFromInstruction(insn, 8, 6);
9480 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9483 tmp = fieldFromInstruction(insn, 0, 5);
9484 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9485 tmp = fieldFromInstruction(insn, 0, 5);
9486 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9487 tmp = fieldFromInstruction(insn, 16, 5);
9488 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9489 tmp = fieldFromInstruction(insn, 8, 6);
9490 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9491 tmp = 0x0;
9492 tmp |= fieldFromInstruction(insn, 5, 3) << 0;
9493 tmp |= fieldFromInstruction(insn, 21, 3) << 3;
9494 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9497 tmp = fieldFromInstruction(insn, 0, 5);
9498 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9499 tmp = fieldFromInstruction(insn, 16, 5);
9500 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9503 tmp = fieldFromInstruction(insn, 0, 2);
9504 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9505 tmp = fieldFromInstruction(insn, 16, 5);
9506 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9507 tmp = fieldFromInstruction(insn, 8, 5);
9508 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9511 tmp = fieldFromInstruction(insn, 0, 2);
9512 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9513 tmp = fieldFromInstruction(insn, 16, 5);
9514 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9517 tmp = fieldFromInstruction(insn, 0, 2);
9518 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9519 tmp = fieldFromInstruction(insn, 16, 5);
9520 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9521 tmp = fieldFromInstruction(insn, 8, 6);
9522 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9525 tmp = fieldFromInstruction(insn, 0, 5);
9526 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9527 tmp = fieldFromInstruction(insn, 8, 2);
9528 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9531 tmp = fieldFromInstruction(insn, 0, 5);
9532 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9533 tmp = fieldFromInstruction(insn, 0, 5);
9534 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9535 tmp = fieldFromInstruction(insn, 16, 5);
9536 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9537 tmp = 0x0;
9538 tmp |= fieldFromInstruction(insn, 5, 3) << 0;
9539 tmp |= fieldFromInstruction(insn, 21, 1) << 3;
9540 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9541 tmp = fieldFromInstruction(insn, 8, 6);
9542 if (s6_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9545 tmp = fieldFromInstruction(insn, 0, 5);
9546 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9547 tmp = fieldFromInstruction(insn, 16, 5);
9548 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9551 tmp = fieldFromInstruction(insn, 0, 5);
9552 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9553 tmp = fieldFromInstruction(insn, 16, 5);
9554 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9555 tmp = fieldFromInstruction(insn, 8, 6);
9556 if (s6_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9559 tmp = fieldFromInstruction(insn, 0, 5);
9560 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9561 tmp = fieldFromInstruction(insn, 16, 5);
9562 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9563 tmp = fieldFromInstruction(insn, 8, 4);
9564 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9567 tmp = fieldFromInstruction(insn, 0, 5);
9568 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9569 tmp = fieldFromInstruction(insn, 16, 5);
9570 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9571 tmp = fieldFromInstruction(insn, 8, 5);
9572 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9575 tmp = fieldFromInstruction(insn, 0, 5);
9576 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9577 tmp = fieldFromInstruction(insn, 16, 5);
9578 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9579 tmp = fieldFromInstruction(insn, 8, 5);
9580 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9583 tmp = fieldFromInstruction(insn, 0, 5);
9584 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9585 tmp = fieldFromInstruction(insn, 16, 2);
9586 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9587 tmp = fieldFromInstruction(insn, 8, 2);
9588 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9591 tmp = fieldFromInstruction(insn, 0, 5);
9592 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9593 tmp = fieldFromInstruction(insn, 16, 2);
9594 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9597 tmp = fieldFromInstruction(insn, 0, 5);
9598 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9599 tmp = fieldFromInstruction(insn, 5, 2);
9600 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9601 tmp = fieldFromInstruction(insn, 16, 5);
9602 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9605 tmp = fieldFromInstruction(insn, 0, 5);
9606 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9607 tmp = fieldFromInstruction(insn, 16, 5);
9608 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9609 tmp = fieldFromInstruction(insn, 8, 5);
9610 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9613 tmp = fieldFromInstruction(insn, 0, 5);
9614 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9615 tmp = fieldFromInstruction(insn, 16, 5);
9616 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9617 tmp = fieldFromInstruction(insn, 8, 6);
9618 if (s6_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9621 tmp = fieldFromInstruction(insn, 0, 5);
9622 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9623 tmp = fieldFromInstruction(insn, 16, 5);
9624 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9625 tmp = fieldFromInstruction(insn, 8, 5);
9626 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9627 tmp = 0x0;
9628 tmp |= fieldFromInstruction(insn, 5, 3) << 0;
9629 tmp |= fieldFromInstruction(insn, 21, 2) << 3;
9630 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9633 tmp = fieldFromInstruction(insn, 0, 5);
9634 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9635 tmp = fieldFromInstruction(insn, 8, 5);
9636 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9637 tmp = 0x0;
9638 tmp |= fieldFromInstruction(insn, 5, 3) << 0;
9639 tmp |= fieldFromInstruction(insn, 21, 2) << 3;
9640 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9643 tmp = fieldFromInstruction(insn, 0, 5);
9644 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9645 tmp = fieldFromInstruction(insn, 0, 5);
9646 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9647 tmp = fieldFromInstruction(insn, 16, 5);
9648 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9649 tmp = fieldFromInstruction(insn, 8, 5);
9650 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9653 tmp = fieldFromInstruction(insn, 0, 5);
9654 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9655 tmp = fieldFromInstruction(insn, 0, 5);
9656 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9657 tmp = fieldFromInstruction(insn, 16, 5);
9658 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9659 tmp = fieldFromInstruction(insn, 8, 5);
9660 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9661 tmp = 0x0;
9662 tmp |= fieldFromInstruction(insn, 5, 3) << 0;
9663 tmp |= fieldFromInstruction(insn, 21, 2) << 3;
9664 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9667 tmp = fieldFromInstruction(insn, 16, 5);
9668 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9669 tmp = fieldFromInstruction(insn, 8, 5);
9670 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9671 tmp = fieldFromInstruction(insn, 13, 1);
9672 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9675 tmp = fieldFromInstruction(insn, 16, 5);
9676 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9677 tmp = fieldFromInstruction(insn, 0, 11) << 3;
9678 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9681 tmp = fieldFromInstruction(insn, 0, 5);
9682 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9683 tmp = fieldFromInstruction(insn, 8, 2);
9684 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9685 tmp = fieldFromInstruction(insn, 16, 5);
9686 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9689 tmp = fieldFromInstruction(insn, 0, 5);
9690 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9691 tmp = fieldFromInstruction(insn, 16, 5);
9692 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9693 tmp = 0x0;
9694 tmp |= fieldFromInstruction(insn, 5, 9) << 1;
9695 tmp |= fieldFromInstruction(insn, 25, 2) << 10;
9696 if (s31_1ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9699 tmp = fieldFromInstruction(insn, 0, 5);
9700 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9701 tmp = fieldFromInstruction(insn, 16, 5);
9702 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9703 tmp = fieldFromInstruction(insn, 16, 5);
9704 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9705 tmp = fieldFromInstruction(insn, 5, 4) << 1;
9706 if (s4_1ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9707 tmp = fieldFromInstruction(insn, 13, 1);
9708 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9711 tmp = fieldFromInstruction(insn, 0, 5);
9712 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9713 tmp = fieldFromInstruction(insn, 16, 5);
9714 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9715 tmp = fieldFromInstruction(insn, 16, 5);
9716 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9717 tmp = fieldFromInstruction(insn, 13, 1);
9718 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9721 tmp = fieldFromInstruction(insn, 0, 5);
9722 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9723 tmp = fieldFromInstruction(insn, 16, 5);
9724 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9725 tmp = fieldFromInstruction(insn, 16, 5);
9726 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9727 tmp = fieldFromInstruction(insn, 5, 4) << 1;
9728 if (s4_1ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9731 tmp = fieldFromInstruction(insn, 0, 5);
9732 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9733 tmp = fieldFromInstruction(insn, 0, 5);
9734 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9735 tmp = fieldFromInstruction(insn, 16, 5);
9736 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9737 tmp = 0x0;
9738 tmp |= fieldFromInstruction(insn, 5, 9) << 1;
9739 tmp |= fieldFromInstruction(insn, 25, 2) << 10;
9740 if (s31_1ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9743 tmp = fieldFromInstruction(insn, 0, 5);
9744 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9745 tmp = fieldFromInstruction(insn, 16, 5);
9746 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9747 tmp = fieldFromInstruction(insn, 0, 5);
9748 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9749 tmp = fieldFromInstruction(insn, 16, 5);
9750 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9751 tmp = fieldFromInstruction(insn, 5, 4) << 1;
9752 if (s4_1ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9753 tmp = fieldFromInstruction(insn, 13, 1);
9754 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9757 tmp = fieldFromInstruction(insn, 0, 5);
9758 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9759 tmp = fieldFromInstruction(insn, 16, 5);
9760 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9761 tmp = fieldFromInstruction(insn, 0, 5);
9762 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9763 tmp = fieldFromInstruction(insn, 16, 5);
9764 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9765 tmp = fieldFromInstruction(insn, 13, 1);
9766 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9769 tmp = fieldFromInstruction(insn, 0, 5);
9770 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9771 tmp = fieldFromInstruction(insn, 16, 5);
9772 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9773 tmp = fieldFromInstruction(insn, 0, 5);
9774 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9775 tmp = fieldFromInstruction(insn, 16, 5);
9776 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9777 tmp = fieldFromInstruction(insn, 5, 4) << 1;
9778 if (s4_1ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9781 tmp = fieldFromInstruction(insn, 0, 5);
9782 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9783 tmp = fieldFromInstruction(insn, 0, 5);
9784 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9785 tmp = fieldFromInstruction(insn, 16, 5);
9786 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9787 tmp = 0x0;
9788 tmp |= fieldFromInstruction(insn, 5, 9) << 0;
9789 tmp |= fieldFromInstruction(insn, 25, 2) << 9;
9790 if (s32_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9793 tmp = fieldFromInstruction(insn, 0, 5);
9794 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9795 tmp = fieldFromInstruction(insn, 16, 5);
9796 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9797 tmp = fieldFromInstruction(insn, 0, 5);
9798 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9799 tmp = fieldFromInstruction(insn, 16, 5);
9800 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9801 tmp = fieldFromInstruction(insn, 5, 4);
9802 if (s4_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9803 tmp = fieldFromInstruction(insn, 13, 1);
9804 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9807 tmp = fieldFromInstruction(insn, 0, 5);
9808 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9809 tmp = fieldFromInstruction(insn, 16, 5);
9810 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9811 tmp = fieldFromInstruction(insn, 0, 5);
9812 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9813 tmp = fieldFromInstruction(insn, 16, 5);
9814 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9815 tmp = fieldFromInstruction(insn, 5, 4);
9816 if (s4_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9819 tmp = fieldFromInstruction(insn, 0, 5);
9820 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9821 tmp = fieldFromInstruction(insn, 16, 5);
9822 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9823 tmp = 0x0;
9824 tmp |= fieldFromInstruction(insn, 5, 9) << 2;
9825 tmp |= fieldFromInstruction(insn, 25, 2) << 11;
9826 if (s30_2ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9829 tmp = fieldFromInstruction(insn, 0, 5);
9830 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9831 tmp = fieldFromInstruction(insn, 16, 5);
9832 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9833 tmp = fieldFromInstruction(insn, 16, 5);
9834 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9835 tmp = fieldFromInstruction(insn, 5, 4) << 2;
9836 if (s4_2ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9837 tmp = fieldFromInstruction(insn, 13, 1);
9838 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9841 tmp = fieldFromInstruction(insn, 0, 5);
9842 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9843 tmp = fieldFromInstruction(insn, 16, 5);
9844 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9845 tmp = fieldFromInstruction(insn, 16, 5);
9846 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9847 tmp = fieldFromInstruction(insn, 13, 1);
9848 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9851 tmp = fieldFromInstruction(insn, 0, 5);
9852 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9853 tmp = fieldFromInstruction(insn, 16, 5);
9854 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9855 tmp = fieldFromInstruction(insn, 16, 5);
9856 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9857 tmp = fieldFromInstruction(insn, 5, 4) << 2;
9858 if (s4_2ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9861 tmp = fieldFromInstruction(insn, 0, 5);
9862 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9863 tmp = fieldFromInstruction(insn, 16, 5);
9864 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9865 tmp = 0x0;
9866 tmp |= fieldFromInstruction(insn, 5, 9) << 0;
9867 tmp |= fieldFromInstruction(insn, 25, 2) << 9;
9868 if (s32_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9871 tmp = fieldFromInstruction(insn, 0, 5);
9872 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9873 tmp = fieldFromInstruction(insn, 16, 5);
9874 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9875 tmp = fieldFromInstruction(insn, 16, 5);
9876 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9877 tmp = fieldFromInstruction(insn, 5, 4);
9878 if (s4_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9879 tmp = fieldFromInstruction(insn, 13, 1);
9880 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9883 tmp = fieldFromInstruction(insn, 0, 5);
9884 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9885 tmp = fieldFromInstruction(insn, 16, 5);
9886 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9887 tmp = fieldFromInstruction(insn, 16, 5);
9888 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9889 tmp = fieldFromInstruction(insn, 5, 4);
9890 if (s4_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9893 tmp = fieldFromInstruction(insn, 0, 5);
9894 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9895 tmp = fieldFromInstruction(insn, 16, 5);
9896 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9897 tmp = fieldFromInstruction(insn, 9, 2);
9898 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9899 tmp = fieldFromInstruction(insn, 16, 5);
9900 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9901 tmp = fieldFromInstruction(insn, 5, 4);
9902 if (s4_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9905 tmp = fieldFromInstruction(insn, 0, 5);
9906 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9907 tmp = fieldFromInstruction(insn, 16, 5);
9908 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9909 tmp = fieldFromInstruction(insn, 9, 2);
9910 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9911 tmp = fieldFromInstruction(insn, 16, 5);
9912 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9913 tmp = fieldFromInstruction(insn, 5, 4) << 1;
9914 if (s4_1ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9917 tmp = fieldFromInstruction(insn, 0, 5);
9918 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9919 tmp = fieldFromInstruction(insn, 16, 5);
9920 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9921 tmp = 0x0;
9922 tmp |= fieldFromInstruction(insn, 5, 9) << 2;
9923 tmp |= fieldFromInstruction(insn, 25, 2) << 11;
9924 if (s30_2ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9927 tmp = fieldFromInstruction(insn, 0, 5);
9928 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9929 tmp = fieldFromInstruction(insn, 16, 5);
9930 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9931 tmp = fieldFromInstruction(insn, 16, 5);
9932 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9933 tmp = fieldFromInstruction(insn, 5, 4) << 2;
9934 if (s4_2ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9935 tmp = fieldFromInstruction(insn, 13, 1);
9936 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9939 tmp = fieldFromInstruction(insn, 0, 5);
9940 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9941 tmp = fieldFromInstruction(insn, 16, 5);
9942 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9943 tmp = fieldFromInstruction(insn, 16, 5);
9944 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9945 tmp = fieldFromInstruction(insn, 5, 4) << 2;
9946 if (s4_2ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9949 tmp = fieldFromInstruction(insn, 0, 5);
9950 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9951 tmp = fieldFromInstruction(insn, 16, 5);
9952 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9953 tmp = fieldFromInstruction(insn, 9, 2);
9954 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9955 tmp = fieldFromInstruction(insn, 16, 5);
9956 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9957 tmp = fieldFromInstruction(insn, 5, 4) << 2;
9958 if (s4_2ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9961 tmp = fieldFromInstruction(insn, 0, 5);
9962 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9963 tmp = fieldFromInstruction(insn, 16, 5);
9964 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9965 tmp = 0x0;
9966 tmp |= fieldFromInstruction(insn, 5, 9) << 3;
9967 tmp |= fieldFromInstruction(insn, 25, 2) << 12;
9968 if (s29_3ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9971 tmp = fieldFromInstruction(insn, 0, 5);
9972 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9973 tmp = fieldFromInstruction(insn, 16, 5);
9974 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9975 tmp = fieldFromInstruction(insn, 16, 5);
9976 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9977 tmp = fieldFromInstruction(insn, 5, 4) << 3;
9978 if (s4_3ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9979 tmp = fieldFromInstruction(insn, 13, 1);
9980 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9983 tmp = fieldFromInstruction(insn, 0, 5);
9984 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9985 tmp = fieldFromInstruction(insn, 16, 5);
9986 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9987 tmp = fieldFromInstruction(insn, 16, 5);
9988 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9989 tmp = fieldFromInstruction(insn, 5, 4) << 3;
9990 if (s4_3ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9993 tmp = fieldFromInstruction(insn, 0, 5);
9994 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9995 tmp = fieldFromInstruction(insn, 16, 5);
9996 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9997 tmp = fieldFromInstruction(insn, 9, 2);
9998 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
9999 tmp = fieldFromInstruction(insn, 16, 5);
10000 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10001 tmp = fieldFromInstruction(insn, 5, 4) << 3;
10002 if (s4_3ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10005 tmp = fieldFromInstruction(insn, 16, 5);
10006 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10007 tmp = fieldFromInstruction(insn, 8, 5);
10008 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10011 tmp = fieldFromInstruction(insn, 16, 5);
10012 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10013 tmp = fieldFromInstruction(insn, 16, 5);
10014 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10015 tmp = fieldFromInstruction(insn, 0, 11) << 3;
10016 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10019 tmp = fieldFromInstruction(insn, 16, 5);
10020 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10021 tmp = fieldFromInstruction(insn, 8, 5);
10022 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10025 tmp = fieldFromInstruction(insn, 0, 2);
10026 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10027 tmp = fieldFromInstruction(insn, 16, 5);
10028 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10029 tmp = fieldFromInstruction(insn, 8, 5);
10030 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10033 tmp = fieldFromInstruction(insn, 0, 2);
10034 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10035 tmp = fieldFromInstruction(insn, 16, 5);
10036 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10037 tmp = fieldFromInstruction(insn, 8, 5);
10038 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10041 tmp = fieldFromInstruction(insn, 16, 5);
10042 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10043 tmp = 0x0;
10044 tmp |= fieldFromInstruction(insn, 0, 8) << 0;
10045 tmp |= fieldFromInstruction(insn, 13, 1) << 8;
10046 tmp |= fieldFromInstruction(insn, 25, 2) << 9;
10047 if (s32_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10048 tmp = fieldFromInstruction(insn, 8, 5);
10049 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10052 tmp = fieldFromInstruction(insn, 16, 5);
10053 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10054 tmp = fieldFromInstruction(insn, 16, 5);
10055 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10056 tmp = fieldFromInstruction(insn, 3, 4);
10057 if (s4_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10058 tmp = fieldFromInstruction(insn, 13, 1);
10059 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10060 tmp = fieldFromInstruction(insn, 8, 5);
10061 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10064 tmp = fieldFromInstruction(insn, 16, 5);
10065 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10066 tmp = fieldFromInstruction(insn, 16, 5);
10067 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10068 tmp = fieldFromInstruction(insn, 13, 1);
10069 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10070 tmp = fieldFromInstruction(insn, 8, 5);
10071 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10074 tmp = fieldFromInstruction(insn, 16, 5);
10075 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10076 tmp = fieldFromInstruction(insn, 16, 5);
10077 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10078 tmp = fieldFromInstruction(insn, 3, 4);
10079 if (s4_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10080 tmp = fieldFromInstruction(insn, 8, 5);
10081 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10084 tmp = fieldFromInstruction(insn, 16, 5);
10085 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10086 tmp = fieldFromInstruction(insn, 0, 2);
10087 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10088 tmp = fieldFromInstruction(insn, 16, 5);
10089 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10090 tmp = fieldFromInstruction(insn, 3, 4);
10091 if (s4_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10092 tmp = fieldFromInstruction(insn, 8, 5);
10093 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10096 tmp = fieldFromInstruction(insn, 16, 5);
10097 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10098 tmp = 0x0;
10099 tmp |= fieldFromInstruction(insn, 0, 8) << 1;
10100 tmp |= fieldFromInstruction(insn, 13, 1) << 9;
10101 tmp |= fieldFromInstruction(insn, 25, 2) << 10;
10102 if (s31_1ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10103 tmp = fieldFromInstruction(insn, 8, 5);
10104 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10107 tmp = fieldFromInstruction(insn, 16, 5);
10108 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10109 tmp = fieldFromInstruction(insn, 16, 5);
10110 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10111 tmp = fieldFromInstruction(insn, 3, 4) << 1;
10112 if (s4_1ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10113 tmp = fieldFromInstruction(insn, 13, 1);
10114 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10115 tmp = fieldFromInstruction(insn, 8, 5);
10116 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10119 tmp = fieldFromInstruction(insn, 16, 5);
10120 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10121 tmp = fieldFromInstruction(insn, 16, 5);
10122 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10123 tmp = fieldFromInstruction(insn, 3, 4) << 1;
10124 if (s4_1ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10125 tmp = fieldFromInstruction(insn, 8, 5);
10126 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10129 tmp = fieldFromInstruction(insn, 16, 5);
10130 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10131 tmp = fieldFromInstruction(insn, 0, 2);
10132 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10133 tmp = fieldFromInstruction(insn, 16, 5);
10134 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10135 tmp = fieldFromInstruction(insn, 3, 4) << 1;
10136 if (s4_1ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10137 tmp = fieldFromInstruction(insn, 8, 5);
10138 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10141 tmp = fieldFromInstruction(insn, 16, 5);
10142 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10143 tmp = 0x0;
10144 tmp |= fieldFromInstruction(insn, 0, 8) << 2;
10145 tmp |= fieldFromInstruction(insn, 13, 1) << 10;
10146 tmp |= fieldFromInstruction(insn, 25, 2) << 11;
10147 if (s30_2ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10148 tmp = fieldFromInstruction(insn, 8, 5);
10149 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10152 tmp = fieldFromInstruction(insn, 16, 5);
10153 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10154 tmp = fieldFromInstruction(insn, 16, 5);
10155 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10156 tmp = fieldFromInstruction(insn, 3, 4) << 2;
10157 if (s4_2ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10158 tmp = fieldFromInstruction(insn, 13, 1);
10159 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10160 tmp = fieldFromInstruction(insn, 8, 5);
10161 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10164 tmp = fieldFromInstruction(insn, 16, 5);
10165 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10166 tmp = fieldFromInstruction(insn, 16, 5);
10167 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10168 tmp = fieldFromInstruction(insn, 3, 4) << 2;
10169 if (s4_2ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10170 tmp = fieldFromInstruction(insn, 8, 5);
10171 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10174 tmp = fieldFromInstruction(insn, 16, 5);
10175 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10176 tmp = fieldFromInstruction(insn, 0, 2);
10177 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10178 tmp = fieldFromInstruction(insn, 16, 5);
10179 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10180 tmp = fieldFromInstruction(insn, 3, 4) << 2;
10181 if (s4_2ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10182 tmp = fieldFromInstruction(insn, 8, 5);
10183 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10186 tmp = fieldFromInstruction(insn, 16, 5);
10187 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10188 tmp = 0x0;
10189 tmp |= fieldFromInstruction(insn, 0, 8) << 0;
10190 tmp |= fieldFromInstruction(insn, 13, 1) << 8;
10191 tmp |= fieldFromInstruction(insn, 25, 2) << 9;
10192 if (s32_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10193 tmp = fieldFromInstruction(insn, 8, 3);
10194 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10197 tmp = fieldFromInstruction(insn, 16, 5);
10198 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10199 tmp = fieldFromInstruction(insn, 16, 5);
10200 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10201 tmp = fieldFromInstruction(insn, 3, 4);
10202 if (s4_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10203 tmp = fieldFromInstruction(insn, 13, 1);
10204 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10205 tmp = fieldFromInstruction(insn, 8, 3);
10206 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10209 tmp = fieldFromInstruction(insn, 16, 5);
10210 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10211 tmp = fieldFromInstruction(insn, 16, 5);
10212 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10213 tmp = fieldFromInstruction(insn, 13, 1);
10214 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10215 tmp = fieldFromInstruction(insn, 8, 3);
10216 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10219 tmp = fieldFromInstruction(insn, 16, 5);
10220 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10221 tmp = fieldFromInstruction(insn, 16, 5);
10222 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10223 tmp = fieldFromInstruction(insn, 3, 4);
10224 if (s4_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10225 tmp = fieldFromInstruction(insn, 8, 3);
10226 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10229 tmp = fieldFromInstruction(insn, 16, 5);
10230 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10231 tmp = fieldFromInstruction(insn, 0, 2);
10232 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10233 tmp = fieldFromInstruction(insn, 16, 5);
10234 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10235 tmp = fieldFromInstruction(insn, 3, 4);
10236 if (s4_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10237 tmp = fieldFromInstruction(insn, 8, 3);
10238 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10241 tmp = fieldFromInstruction(insn, 16, 5);
10242 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10243 tmp = 0x0;
10244 tmp |= fieldFromInstruction(insn, 0, 8) << 1;
10245 tmp |= fieldFromInstruction(insn, 13, 1) << 9;
10246 tmp |= fieldFromInstruction(insn, 25, 2) << 10;
10247 if (s31_1ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10248 tmp = fieldFromInstruction(insn, 8, 3);
10249 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10252 tmp = fieldFromInstruction(insn, 16, 5);
10253 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10254 tmp = fieldFromInstruction(insn, 16, 5);
10255 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10256 tmp = fieldFromInstruction(insn, 3, 4) << 1;
10257 if (s4_1ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10258 tmp = fieldFromInstruction(insn, 13, 1);
10259 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10260 tmp = fieldFromInstruction(insn, 8, 3);
10261 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10264 tmp = fieldFromInstruction(insn, 16, 5);
10265 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10266 tmp = fieldFromInstruction(insn, 16, 5);
10267 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10268 tmp = fieldFromInstruction(insn, 3, 4) << 1;
10269 if (s4_1ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10270 tmp = fieldFromInstruction(insn, 8, 3);
10271 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10274 tmp = fieldFromInstruction(insn, 16, 5);
10275 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10276 tmp = fieldFromInstruction(insn, 0, 2);
10277 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10278 tmp = fieldFromInstruction(insn, 16, 5);
10279 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10280 tmp = fieldFromInstruction(insn, 3, 4) << 1;
10281 if (s4_1ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10282 tmp = fieldFromInstruction(insn, 8, 3);
10283 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10286 tmp = fieldFromInstruction(insn, 16, 5);
10287 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10288 tmp = 0x0;
10289 tmp |= fieldFromInstruction(insn, 0, 8) << 2;
10290 tmp |= fieldFromInstruction(insn, 13, 1) << 10;
10291 tmp |= fieldFromInstruction(insn, 25, 2) << 11;
10292 if (s30_2ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10293 tmp = fieldFromInstruction(insn, 8, 3);
10294 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10297 tmp = fieldFromInstruction(insn, 16, 5);
10298 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10299 tmp = fieldFromInstruction(insn, 16, 5);
10300 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10301 tmp = fieldFromInstruction(insn, 3, 4) << 2;
10302 if (s4_2ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10303 tmp = fieldFromInstruction(insn, 13, 1);
10304 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10305 tmp = fieldFromInstruction(insn, 8, 3);
10306 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10309 tmp = fieldFromInstruction(insn, 16, 5);
10310 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10311 tmp = fieldFromInstruction(insn, 16, 5);
10312 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10313 tmp = fieldFromInstruction(insn, 3, 4) << 2;
10314 if (s4_2ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10315 tmp = fieldFromInstruction(insn, 8, 3);
10316 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10319 tmp = fieldFromInstruction(insn, 16, 5);
10320 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10321 tmp = fieldFromInstruction(insn, 0, 2);
10322 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10323 tmp = fieldFromInstruction(insn, 16, 5);
10324 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10325 tmp = fieldFromInstruction(insn, 3, 4) << 2;
10326 if (s4_2ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10327 tmp = fieldFromInstruction(insn, 8, 3);
10328 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10331 tmp = fieldFromInstruction(insn, 16, 5);
10332 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10333 tmp = 0x0;
10334 tmp |= fieldFromInstruction(insn, 0, 8) << 3;
10335 tmp |= fieldFromInstruction(insn, 13, 1) << 11;
10336 tmp |= fieldFromInstruction(insn, 25, 2) << 12;
10337 if (s29_3ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10338 tmp = fieldFromInstruction(insn, 8, 5);
10339 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10342 tmp = fieldFromInstruction(insn, 16, 5);
10343 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10344 tmp = fieldFromInstruction(insn, 16, 5);
10345 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10346 tmp = fieldFromInstruction(insn, 3, 4) << 3;
10347 if (s4_3ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10348 tmp = fieldFromInstruction(insn, 13, 1);
10349 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10350 tmp = fieldFromInstruction(insn, 8, 5);
10351 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10354 tmp = fieldFromInstruction(insn, 16, 5);
10355 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10356 tmp = fieldFromInstruction(insn, 16, 5);
10357 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10358 tmp = fieldFromInstruction(insn, 13, 1);
10359 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10360 tmp = fieldFromInstruction(insn, 8, 5);
10361 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10364 tmp = fieldFromInstruction(insn, 16, 5);
10365 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10366 tmp = fieldFromInstruction(insn, 16, 5);
10367 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10368 tmp = fieldFromInstruction(insn, 3, 4) << 3;
10369 if (s4_3ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10370 tmp = fieldFromInstruction(insn, 8, 5);
10371 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10374 tmp = fieldFromInstruction(insn, 16, 5);
10375 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10376 tmp = fieldFromInstruction(insn, 0, 2);
10377 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10378 tmp = fieldFromInstruction(insn, 16, 5);
10379 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10380 tmp = fieldFromInstruction(insn, 3, 4) << 3;
10381 if (s4_3ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10382 tmp = fieldFromInstruction(insn, 8, 5);
10383 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10386 tmp = fieldFromInstruction(insn, 0, 5);
10387 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10388 tmp = fieldFromInstruction(insn, 16, 5);
10389 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10390 tmp = 0x0;
10391 tmp |= fieldFromInstruction(insn, 5, 9) << 0;
10392 tmp |= fieldFromInstruction(insn, 21, 7) << 9;
10393 if (s32_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10396 tmp = fieldFromInstruction(insn, 0, 5);
10397 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10398 tmp = fieldFromInstruction(insn, 8, 5);
10399 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10400 tmp = fieldFromInstruction(insn, 16, 5);
10401 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10402 tmp = fieldFromInstruction(insn, 5, 3);
10403 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10406 tmp = fieldFromInstruction(insn, 0, 5);
10407 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10408 tmp = fieldFromInstruction(insn, 16, 5);
10409 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10410 tmp = fieldFromInstruction(insn, 8, 5);
10411 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10412 tmp = fieldFromInstruction(insn, 5, 3);
10413 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10416 tmp = fieldFromInstruction(insn, 0, 5);
10417 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10418 tmp = fieldFromInstruction(insn, 16, 5);
10419 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10420 tmp = fieldFromInstruction(insn, 8, 5);
10421 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10424 tmp = fieldFromInstruction(insn, 0, 5);
10425 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10426 tmp = fieldFromInstruction(insn, 8, 5);
10427 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10428 tmp = fieldFromInstruction(insn, 16, 5);
10429 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10432 tmp = fieldFromInstruction(insn, 0, 5);
10433 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10434 tmp = fieldFromInstruction(insn, 16, 5);
10435 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10436 tmp = fieldFromInstruction(insn, 8, 5);
10437 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10440 tmp = fieldFromInstruction(insn, 0, 5);
10441 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10442 tmp = fieldFromInstruction(insn, 8, 5);
10443 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10444 tmp = fieldFromInstruction(insn, 16, 5);
10445 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10446 tmp = fieldFromInstruction(insn, 5, 2);
10447 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10450 tmp = fieldFromInstruction(insn, 0, 5);
10451 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10452 tmp = fieldFromInstruction(insn, 16, 5);
10453 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10454 tmp = fieldFromInstruction(insn, 8, 5);
10455 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10456 tmp = fieldFromInstruction(insn, 5, 2);
10457 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10460 tmp = fieldFromInstruction(insn, 0, 5);
10461 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10462 tmp = fieldFromInstruction(insn, 5, 2);
10463 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10464 tmp = fieldFromInstruction(insn, 16, 5);
10465 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10466 tmp = fieldFromInstruction(insn, 8, 5);
10467 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10468 tmp = fieldFromInstruction(insn, 5, 2);
10469 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10472 tmp = fieldFromInstruction(insn, 0, 5);
10473 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10474 tmp = fieldFromInstruction(insn, 16, 5);
10475 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10476 tmp = fieldFromInstruction(insn, 8, 5);
10477 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10480 tmp = fieldFromInstruction(insn, 0, 5);
10481 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10482 tmp = fieldFromInstruction(insn, 16, 5);
10483 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10484 tmp = fieldFromInstruction(insn, 8, 5);
10485 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10486 tmp = 0x0;
10487 tmp |= fieldFromInstruction(insn, 5, 1) << 0;
10488 tmp |= fieldFromInstruction(insn, 13, 1) << 1;
10489 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10492 tmp = fieldFromInstruction(insn, 0, 5);
10493 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10494 tmp = fieldFromInstruction(insn, 8, 5);
10495 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10496 tmp = fieldFromInstruction(insn, 16, 5);
10497 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10498 tmp = fieldFromInstruction(insn, 5, 3);
10499 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10502 tmp = fieldFromInstruction(insn, 0, 5);
10503 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10504 tmp = fieldFromInstruction(insn, 16, 5);
10505 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10506 tmp = fieldFromInstruction(insn, 8, 5);
10507 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10510 tmp = fieldFromInstruction(insn, 0, 5);
10511 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10512 tmp = fieldFromInstruction(insn, 16, 5);
10513 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10514 tmp = fieldFromInstruction(insn, 8, 5);
10515 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10518 tmp = fieldFromInstruction(insn, 0, 5);
10519 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10520 tmp = 0x0;
10521 tmp |= fieldFromInstruction(insn, 5, 1) << 0;
10522 tmp |= fieldFromInstruction(insn, 16, 5) << 1;
10523 if (s6_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10524 tmp = fieldFromInstruction(insn, 8, 5);
10525 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10528 tmp = fieldFromInstruction(insn, 0, 5);
10529 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10530 tmp = fieldFromInstruction(insn, 0, 5);
10531 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10532 tmp = fieldFromInstruction(insn, 16, 5);
10533 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10534 tmp = fieldFromInstruction(insn, 8, 5);
10535 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10538 tmp = fieldFromInstruction(insn, 0, 5);
10539 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10540 tmp = fieldFromInstruction(insn, 16, 5);
10541 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10542 tmp = fieldFromInstruction(insn, 8, 5);
10543 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10546 tmp = fieldFromInstruction(insn, 0, 5);
10547 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10548 tmp = fieldFromInstruction(insn, 0, 5);
10549 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10550 tmp = fieldFromInstruction(insn, 16, 5);
10551 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10552 tmp = fieldFromInstruction(insn, 8, 5);
10553 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10556 tmp = fieldFromInstruction(insn, 0, 5);
10557 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10558 tmp = fieldFromInstruction(insn, 0, 5);
10559 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10560 tmp = fieldFromInstruction(insn, 16, 5);
10561 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10562 tmp = fieldFromInstruction(insn, 8, 5);
10563 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10566 tmp = fieldFromInstruction(insn, 8, 5);
10567 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10568 tmp = fieldFromInstruction(insn, 8, 5);
10569 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10570 tmp = fieldFromInstruction(insn, 16, 5);
10571 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10572 tmp = fieldFromInstruction(insn, 0, 5);
10573 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10576 tmp = fieldFromInstruction(insn, 0, 5);
10577 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10578 tmp = fieldFromInstruction(insn, 0, 5);
10579 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10580 tmp = fieldFromInstruction(insn, 16, 5);
10581 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10582 tmp = fieldFromInstruction(insn, 8, 5);
10583 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10584 tmp = 0x0;
10585 tmp |= fieldFromInstruction(insn, 5, 1) << 0;
10586 tmp |= fieldFromInstruction(insn, 13, 1) << 1;
10587 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10590 tmp = fieldFromInstruction(insn, 0, 5);
10591 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10592 tmp = fieldFromInstruction(insn, 0, 5);
10593 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10594 tmp = fieldFromInstruction(insn, 16, 5);
10595 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10596 tmp = fieldFromInstruction(insn, 8, 5);
10597 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10600 tmp = fieldFromInstruction(insn, 0, 5);
10601 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10602 tmp = fieldFromInstruction(insn, 5, 2);
10603 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10604 tmp = fieldFromInstruction(insn, 16, 5);
10605 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10606 tmp = fieldFromInstruction(insn, 8, 5);
10607 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10610 tmp = fieldFromInstruction(insn, 0, 2);
10611 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10612 tmp = fieldFromInstruction(insn, 16, 5);
10613 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10614 tmp = fieldFromInstruction(insn, 8, 5);
10615 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10618 tmp = fieldFromInstruction(insn, 0, 2);
10619 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10620 tmp = fieldFromInstruction(insn, 16, 5);
10621 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10622 tmp = fieldFromInstruction(insn, 8, 5);
10623 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10626 tmp = fieldFromInstruction(insn, 0, 5);
10627 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10628 tmp = fieldFromInstruction(insn, 16, 5);
10629 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10630 tmp = fieldFromInstruction(insn, 8, 5);
10631 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10634 tmp = fieldFromInstruction(insn, 0, 5);
10635 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10636 tmp = fieldFromInstruction(insn, 8, 5);
10637 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10638 tmp = fieldFromInstruction(insn, 16, 5);
10639 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10642 tmp = fieldFromInstruction(insn, 0, 5);
10643 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10644 tmp = 0x0;
10645 tmp |= fieldFromInstruction(insn, 5, 9) << 0;
10646 tmp |= fieldFromInstruction(insn, 21, 1) << 9;
10647 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10650 tmp = fieldFromInstruction(insn, 0, 5);
10651 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10652 tmp = 0x0;
10653 tmp |= fieldFromInstruction(insn, 5, 3) << 0;
10654 tmp |= fieldFromInstruction(insn, 13, 1) << 3;
10655 tmp |= fieldFromInstruction(insn, 21, 2) << 4;
10656 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10657 tmp = fieldFromInstruction(insn, 16, 5);
10658 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10659 tmp = fieldFromInstruction(insn, 8, 5);
10660 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10663 tmp = fieldFromInstruction(insn, 8, 5);
10664 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10665 tmp = 0x0;
10666 tmp |= fieldFromInstruction(insn, 5, 3) << 0;
10667 tmp |= fieldFromInstruction(insn, 13, 1) << 3;
10668 tmp |= fieldFromInstruction(insn, 21, 2) << 4;
10669 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10670 tmp = fieldFromInstruction(insn, 16, 5);
10671 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10672 tmp = 0x0;
10673 tmp |= fieldFromInstruction(insn, 0, 5) << 0;
10674 tmp |= fieldFromInstruction(insn, 23, 1) << 5;
10675 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10678 tmp = fieldFromInstruction(insn, 0, 5);
10679 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10680 tmp = 0x0;
10681 tmp |= fieldFromInstruction(insn, 5, 9) << 0;
10682 tmp |= fieldFromInstruction(insn, 21, 1) << 9;
10683 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10686 tmp = fieldFromInstruction(insn, 0, 5);
10687 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10688 tmp = fieldFromInstruction(insn, 0, 5);
10689 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10690 tmp = fieldFromInstruction(insn, 16, 5);
10691 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10692 tmp = 0x0;
10693 tmp |= fieldFromInstruction(insn, 5, 9) << 0;
10694 tmp |= fieldFromInstruction(insn, 21, 1) << 9;
10695 if (s32_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10698 tmp = fieldFromInstruction(insn, 16, 5);
10699 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10700 tmp = fieldFromInstruction(insn, 0, 5);
10701 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10702 tmp = fieldFromInstruction(insn, 16, 5);
10703 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10704 tmp = 0x0;
10705 tmp |= fieldFromInstruction(insn, 5, 9) << 0;
10706 tmp |= fieldFromInstruction(insn, 21, 1) << 9;
10707 if (s32_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10710 tmp = fieldFromInstruction(insn, 8, 5);
10711 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10712 tmp = fieldFromInstruction(insn, 16, 5);
10713 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10714 tmp = fieldFromInstruction(insn, 0, 5);
10715 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10716 tmp = 0x0;
10717 tmp |= fieldFromInstruction(insn, 5, 3) << 0;
10718 tmp |= fieldFromInstruction(insn, 13, 1) << 3;
10719 tmp |= fieldFromInstruction(insn, 21, 2) << 4;
10720 if (s32_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10723 tmp = fieldFromInstruction(insn, 8, 5);
10724 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10725 tmp = fieldFromInstruction(insn, 16, 5);
10726 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10727 tmp = 0x0;
10728 tmp |= fieldFromInstruction(insn, 5, 3) << 0;
10729 tmp |= fieldFromInstruction(insn, 13, 1) << 3;
10730 tmp |= fieldFromInstruction(insn, 21, 2) << 4;
10731 if (s32_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10732 tmp = fieldFromInstruction(insn, 0, 5);
10733 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10736 tmp = fieldFromInstruction(insn, 0, 2);
10737 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10738 tmp = fieldFromInstruction(insn, 16, 5);
10739 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10740 tmp = fieldFromInstruction(insn, 5, 8);
10741 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10744 tmp = fieldFromInstruction(insn, 0, 2);
10745 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10746 tmp = fieldFromInstruction(insn, 16, 5);
10747 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10748 tmp = fieldFromInstruction(insn, 5, 8);
10749 if (s8_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10752 tmp = fieldFromInstruction(insn, 0, 2);
10753 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10754 tmp = fieldFromInstruction(insn, 16, 5);
10755 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10756 tmp = fieldFromInstruction(insn, 5, 7);
10757 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10760 tmp = fieldFromInstruction(insn, 0, 2);
10761 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10762 tmp = fieldFromInstruction(insn, 16, 5);
10763 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10764 tmp = fieldFromInstruction(insn, 5, 5);
10765 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10768 tmp = fieldFromInstruction(insn, 0, 2);
10769 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10770 tmp = fieldFromInstruction(insn, 16, 5);
10771 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10772 tmp = fieldFromInstruction(insn, 5, 8);
10773 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10776 tmp = fieldFromInstruction(insn, 0, 2);
10777 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10778 tmp = fieldFromInstruction(insn, 16, 5);
10779 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10780 tmp = fieldFromInstruction(insn, 5, 8);
10781 if (s32_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10784 tmp = fieldFromInstruction(insn, 0, 2);
10785 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10786 tmp = fieldFromInstruction(insn, 16, 5);
10787 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10788 tmp = fieldFromInstruction(insn, 5, 8);
10789 if (s8_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10792 tmp = fieldFromInstruction(insn, 0, 2);
10793 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10794 tmp = fieldFromInstruction(insn, 16, 5);
10795 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10796 tmp = fieldFromInstruction(insn, 5, 7);
10797 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10800 tmp = fieldFromInstruction(insn, 16, 5);
10801 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10802 tmp = 0x0;
10803 tmp |= fieldFromInstruction(insn, 3, 1) << 0;
10804 tmp |= fieldFromInstruction(insn, 5, 3) << 1;
10805 tmp |= fieldFromInstruction(insn, 13, 1) << 4;
10806 tmp |= fieldFromInstruction(insn, 21, 3) << 5;
10807 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10808 tmp = fieldFromInstruction(insn, 16, 5);
10809 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10810 tmp = fieldFromInstruction(insn, 8, 5);
10811 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10814 tmp = fieldFromInstruction(insn, 8, 5);
10815 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10816 tmp = fieldFromInstruction(insn, 0, 5);
10817 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10818 tmp = 0x0;
10819 tmp |= fieldFromInstruction(insn, 5, 3) << 2;
10820 tmp |= fieldFromInstruction(insn, 13, 1) << 5;
10821 tmp |= fieldFromInstruction(insn, 21, 2) << 6;
10822 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10823 tmp = fieldFromInstruction(insn, 16, 5);
10824 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10827 tmp = fieldFromInstruction(insn, 8, 5);
10828 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10829 tmp = fieldFromInstruction(insn, 0, 5);
10830 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10831 tmp = fieldFromInstruction(insn, 16, 5);
10832 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10833 tmp = 0x0;
10834 tmp |= fieldFromInstruction(insn, 5, 3) << 0;
10835 tmp |= fieldFromInstruction(insn, 13, 1) << 3;
10836 tmp |= fieldFromInstruction(insn, 21, 2) << 4;
10837 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10840 tmp = fieldFromInstruction(insn, 0, 5);
10841 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10842 tmp = fieldFromInstruction(insn, 16, 5);
10843 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10844 tmp = fieldFromInstruction(insn, 5, 8);
10845 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10848 tmp = fieldFromInstruction(insn, 0, 5);
10849 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10850 tmp = fieldFromInstruction(insn, 0, 5);
10851 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10852 tmp = fieldFromInstruction(insn, 16, 5);
10853 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10854 tmp = fieldFromInstruction(insn, 5, 8);
10855 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10858 tmp = fieldFromInstruction(insn, 0, 5);
10859 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10860 tmp = fieldFromInstruction(insn, 0, 5);
10861 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10862 tmp = fieldFromInstruction(insn, 16, 5);
10863 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10864 tmp = fieldFromInstruction(insn, 5, 8);
10865 if (s32_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10868 tmp = fieldFromInstruction(insn, 8, 5);
10869 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10870 tmp = fieldFromInstruction(insn, 0, 5);
10871 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10872 tmp = fieldFromInstruction(insn, 8, 5);
10873 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10874 tmp = fieldFromInstruction(insn, 16, 5);
10875 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10878 tmp = fieldFromInstruction(insn, 0, 5);
10879 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10880 tmp = fieldFromInstruction(insn, 0, 5);
10881 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10882 tmp = fieldFromInstruction(insn, 16, 5);
10883 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10884 tmp = fieldFromInstruction(insn, 8, 5);
10885 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10888 tmp = fieldFromInstruction(insn, 0, 5);
10889 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10890 tmp = fieldFromInstruction(insn, 5, 2);
10891 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10892 tmp = fieldFromInstruction(insn, 0, 5);
10893 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10894 tmp = fieldFromInstruction(insn, 16, 5);
10895 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10896 tmp = fieldFromInstruction(insn, 8, 5);
10897 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10900 tmp = fieldFromInstruction(insn, 0, 5);
10901 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10902 tmp = fieldFromInstruction(insn, 5, 2);
10903 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10904 tmp = fieldFromInstruction(insn, 8, 5);
10905 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10906 tmp = fieldFromInstruction(insn, 16, 5);
10907 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10910 tmp = fieldFromInstruction(insn, 0, 5);
10911 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10912 tmp = fieldFromInstruction(insn, 5, 2);
10913 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10914 tmp = fieldFromInstruction(insn, 16, 5);
10915 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10916 tmp = fieldFromInstruction(insn, 8, 5);
10917 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10920 tmp = fieldFromInstruction(insn, 0, 5);
10921 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10922 tmp = fieldFromInstruction(insn, 0, 5);
10923 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10924 tmp = fieldFromInstruction(insn, 8, 5);
10925 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10926 tmp = fieldFromInstruction(insn, 16, 5);
10927 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10930 tmp = fieldFromInstruction(insn, 0, 5);
10931 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10932 tmp = fieldFromInstruction(insn, 0, 5);
10933 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10934 tmp = fieldFromInstruction(insn, 16, 5);
10935 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10936 tmp = fieldFromInstruction(insn, 8, 5);
10937 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10938 tmp = fieldFromInstruction(insn, 5, 2);
10939 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10942 tmp = fieldFromInstruction(insn, 0, 5);
10943 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10944 tmp = fieldFromInstruction(insn, 5, 2);
10945 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10946 tmp = fieldFromInstruction(insn, 8, 5);
10947 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10948 tmp = fieldFromInstruction(insn, 16, 5);
10949 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10952 tmp = fieldFromInstruction(insn, 0, 5);
10953 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10954 tmp = fieldFromInstruction(insn, 5, 2);
10955 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10956 tmp = fieldFromInstruction(insn, 16, 5);
10957 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10958 tmp = fieldFromInstruction(insn, 8, 5);
10959 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10962 tmp = fieldFromInstruction(insn, 0, 5);
10963 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10964 tmp = fieldFromInstruction(insn, 8, 5);
10965 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10966 tmp = fieldFromInstruction(insn, 19, 5);
10967 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10968 tmp = fieldFromInstruction(insn, 16, 3);
10969 if (DecodeIntRegsLow8RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10972 tmp = fieldFromInstruction(insn, 0, 5);
10973 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10974 tmp = fieldFromInstruction(insn, 8, 5);
10975 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10976 tmp = fieldFromInstruction(insn, 19, 5);
10977 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10978 tmp = fieldFromInstruction(insn, 16, 3);
10979 if (DecodeIntRegsLow8RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10982 tmp = fieldFromInstruction(insn, 0, 5);
10983 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10984 tmp = fieldFromInstruction(insn, 8, 5);
10985 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10986 tmp = fieldFromInstruction(insn, 16, 5);
10987 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10990 tmp = fieldFromInstruction(insn, 0, 5);
10991 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10992 tmp = fieldFromInstruction(insn, 0, 5);
10993 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10994 tmp = fieldFromInstruction(insn, 8, 5);
10995 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
10996 tmp = fieldFromInstruction(insn, 16, 5);
10997 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11000 tmp = fieldFromInstruction(insn, 0, 5);
11001 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11002 tmp = fieldFromInstruction(insn, 8, 5);
11003 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11004 tmp = fieldFromInstruction(insn, 16, 5);
11005 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11008 tmp = fieldFromInstruction(insn, 0, 5);
11009 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11010 tmp = fieldFromInstruction(insn, 0, 5);
11011 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11012 tmp = fieldFromInstruction(insn, 8, 5);
11013 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11014 tmp = fieldFromInstruction(insn, 16, 5);
11015 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11018 tmp = fieldFromInstruction(insn, 0, 5);
11019 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11020 tmp = fieldFromInstruction(insn, 8, 5);
11021 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11022 tmp = fieldFromInstruction(insn, 16, 5);
11023 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11026 tmp = fieldFromInstruction(insn, 0, 5);
11027 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11028 tmp = fieldFromInstruction(insn, 0, 5);
11029 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11030 tmp = fieldFromInstruction(insn, 8, 5);
11031 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11032 tmp = fieldFromInstruction(insn, 16, 5);
11033 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11036 tmp = fieldFromInstruction(insn, 0, 5);
11037 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11038 tmp = fieldFromInstruction(insn, 8, 5);
11039 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11040 tmp = fieldFromInstruction(insn, 16, 5);
11041 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11044 tmp = fieldFromInstruction(insn, 0, 5);
11045 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11046 tmp = fieldFromInstruction(insn, 0, 5);
11047 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11048 tmp = fieldFromInstruction(insn, 8, 5);
11049 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11050 tmp = fieldFromInstruction(insn, 16, 5);
11051 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11054 tmp = fieldFromInstruction(insn, 0, 5);
11055 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11056 tmp = fieldFromInstruction(insn, 8, 5);
11057 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11058 tmp = fieldFromInstruction(insn, 16, 5);
11059 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11060 tmp = fieldFromInstruction(insn, 5, 1);
11061 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11064 tmp = fieldFromInstruction(insn, 0, 5);
11065 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11066 tmp = fieldFromInstruction(insn, 0, 5);
11067 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11068 tmp = fieldFromInstruction(insn, 8, 5);
11069 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11070 tmp = fieldFromInstruction(insn, 16, 5);
11071 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11072 tmp = fieldFromInstruction(insn, 5, 1);
11073 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11076 tmp = fieldFromInstruction(insn, 0, 5);
11077 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11078 tmp = fieldFromInstruction(insn, 0, 5);
11079 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11080 tmp = fieldFromInstruction(insn, 8, 2);
11081 if (DecodeHvxQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11082 tmp = fieldFromInstruction(insn, 16, 5);
11083 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11086 tmp = fieldFromInstruction(insn, 0, 5);
11087 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11088 tmp = fieldFromInstruction(insn, 8, 5);
11089 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11090 tmp = fieldFromInstruction(insn, 16, 5);
11091 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11094 tmp = fieldFromInstruction(insn, 0, 2);
11095 if (DecodeHvxQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11096 tmp = fieldFromInstruction(insn, 0, 2);
11097 if (DecodeHvxQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11098 tmp = fieldFromInstruction(insn, 8, 5);
11099 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11100 tmp = fieldFromInstruction(insn, 16, 5);
11101 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11104 tmp = fieldFromInstruction(insn, 0, 5);
11105 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11106 tmp = fieldFromInstruction(insn, 0, 5);
11107 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11108 tmp = fieldFromInstruction(insn, 8, 5);
11109 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11110 tmp = fieldFromInstruction(insn, 16, 5);
11111 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11114 tmp = fieldFromInstruction(insn, 0, 5);
11115 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11116 tmp = fieldFromInstruction(insn, 0, 5);
11117 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11118 tmp = fieldFromInstruction(insn, 8, 5);
11119 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11120 tmp = fieldFromInstruction(insn, 16, 5);
11121 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11124 tmp = fieldFromInstruction(insn, 0, 5);
11125 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11126 tmp = fieldFromInstruction(insn, 16, 5);
11127 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11130 tmp = fieldFromInstruction(insn, 0, 5);
11131 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11132 tmp = fieldFromInstruction(insn, 0, 5);
11133 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11134 tmp = fieldFromInstruction(insn, 16, 5);
11135 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11138 tmp = fieldFromInstruction(insn, 0, 2);
11139 if (DecodeHvxQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11140 tmp = fieldFromInstruction(insn, 16, 5);
11141 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11144 tmp = fieldFromInstruction(insn, 0, 2);
11145 if (DecodeHvxQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11146 tmp = fieldFromInstruction(insn, 8, 5);
11147 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11148 tmp = fieldFromInstruction(insn, 16, 5);
11149 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11152 tmp = fieldFromInstruction(insn, 0, 5);
11153 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11154 tmp = fieldFromInstruction(insn, 8, 2);
11155 if (DecodeHvxQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11156 tmp = fieldFromInstruction(insn, 16, 5);
11157 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11160 tmp = fieldFromInstruction(insn, 0, 5);
11161 if (DecodeHvxVQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11162 tmp = fieldFromInstruction(insn, 0, 5);
11163 if (DecodeHvxVQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11164 tmp = fieldFromInstruction(insn, 8, 5);
11165 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11166 tmp = fieldFromInstruction(insn, 16, 3);
11167 if (DecodeIntRegsLow8RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11170 tmp = fieldFromInstruction(insn, 0, 5);
11171 if (DecodeHvxVQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11172 tmp = fieldFromInstruction(insn, 16, 3);
11173 if (DecodeIntRegsLow8RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11174 tmp = fieldFromInstruction(insn, 0, 5);
11175 if (DecodeHvxVQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11176 tmp = fieldFromInstruction(insn, 8, 5);
11177 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11178 tmp = fieldFromInstruction(insn, 16, 3);
11179 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11182 tmp = fieldFromInstruction(insn, 0, 5);
11183 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11184 tmp = fieldFromInstruction(insn, 8, 5);
11185 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11186 tmp = fieldFromInstruction(insn, 16, 5);
11187 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11190 tmp = fieldFromInstruction(insn, 0, 5);
11191 if (DecodeHvxVQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11192 tmp = fieldFromInstruction(insn, 16, 3);
11193 if (DecodeIntRegsLow8RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11194 tmp = fieldFromInstruction(insn, 8, 5);
11195 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11196 tmp = fieldFromInstruction(insn, 16, 3);
11197 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11200 tmp = fieldFromInstruction(insn, 0, 5);
11201 if (DecodeHvxVQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11202 tmp = fieldFromInstruction(insn, 8, 5);
11203 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11204 tmp = fieldFromInstruction(insn, 16, 3);
11205 if (DecodeIntRegsLow8RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11208 tmp = fieldFromInstruction(insn, 8, 5);
11209 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11210 tmp = fieldFromInstruction(insn, 0, 5);
11211 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11212 tmp = fieldFromInstruction(insn, 8, 5);
11213 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11214 tmp = fieldFromInstruction(insn, 0, 5);
11215 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11216 tmp = fieldFromInstruction(insn, 16, 5);
11217 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11220 tmp = fieldFromInstruction(insn, 0, 5);
11221 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11222 tmp = fieldFromInstruction(insn, 5, 2);
11223 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11224 tmp = fieldFromInstruction(insn, 8, 5);
11225 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11228 tmp = fieldFromInstruction(insn, 0, 5);
11229 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11230 tmp = fieldFromInstruction(insn, 5, 2);
11231 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11232 tmp = fieldFromInstruction(insn, 8, 5);
11233 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11234 tmp = fieldFromInstruction(insn, 16, 5);
11235 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11238 tmp = fieldFromInstruction(insn, 0, 5);
11239 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11240 tmp = fieldFromInstruction(insn, 8, 5);
11241 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11242 tmp = fieldFromInstruction(insn, 16, 5);
11243 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11246 tmp = fieldFromInstruction(insn, 0, 5);
11247 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11248 tmp = fieldFromInstruction(insn, 0, 5);
11249 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11250 tmp = fieldFromInstruction(insn, 8, 5);
11251 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11252 tmp = fieldFromInstruction(insn, 16, 5);
11253 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11256 tmp = fieldFromInstruction(insn, 0, 5);
11257 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11258 tmp = fieldFromInstruction(insn, 0, 5);
11259 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11260 tmp = fieldFromInstruction(insn, 8, 5);
11261 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11262 tmp = fieldFromInstruction(insn, 19, 5);
11263 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11264 tmp = fieldFromInstruction(insn, 16, 3);
11265 if (DecodeIntRegsLow8RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11268 tmp = fieldFromInstruction(insn, 0, 5);
11269 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11270 tmp = fieldFromInstruction(insn, 0, 5);
11271 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11272 tmp = fieldFromInstruction(insn, 8, 5);
11273 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11274 tmp = fieldFromInstruction(insn, 19, 5);
11275 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11276 tmp = fieldFromInstruction(insn, 16, 3);
11277 if (DecodeIntRegsLow8RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11280 tmp = fieldFromInstruction(insn, 0, 5);
11281 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11282 tmp = fieldFromInstruction(insn, 0, 5);
11283 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11284 tmp = fieldFromInstruction(insn, 8, 5);
11285 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11286 tmp = fieldFromInstruction(insn, 16, 5);
11287 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11290 tmp = fieldFromInstruction(insn, 0, 5);
11291 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11292 tmp = fieldFromInstruction(insn, 8, 5);
11293 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11294 tmp = fieldFromInstruction(insn, 16, 5);
11295 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11298 tmp = fieldFromInstruction(insn, 0, 5);
11299 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11300 tmp = fieldFromInstruction(insn, 8, 5);
11301 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11302 tmp = fieldFromInstruction(insn, 16, 5);
11303 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11306 tmp = fieldFromInstruction(insn, 0, 2);
11307 if (DecodeHvxQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11308 tmp = fieldFromInstruction(insn, 0, 2);
11309 if (DecodeHvxQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11310 tmp = fieldFromInstruction(insn, 8, 5);
11311 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11312 tmp = fieldFromInstruction(insn, 16, 5);
11313 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11316 tmp = fieldFromInstruction(insn, 0, 5);
11317 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11318 tmp = fieldFromInstruction(insn, 5, 2);
11319 if (DecodeHvxQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11320 tmp = fieldFromInstruction(insn, 8, 5);
11321 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11322 tmp = fieldFromInstruction(insn, 16, 5);
11323 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11324 tmp = fieldFromInstruction(insn, 5, 2);
11325 if (DecodeHvxQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11328 tmp = fieldFromInstruction(insn, 0, 5);
11329 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11330 tmp = fieldFromInstruction(insn, 0, 5);
11331 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11332 tmp = fieldFromInstruction(insn, 8, 5);
11333 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11334 tmp = fieldFromInstruction(insn, 16, 5);
11335 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11336 tmp = fieldFromInstruction(insn, 5, 3);
11337 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11340 tmp = fieldFromInstruction(insn, 0, 5);
11341 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11342 tmp = fieldFromInstruction(insn, 0, 5);
11343 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11344 tmp = fieldFromInstruction(insn, 8, 5);
11345 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11346 tmp = fieldFromInstruction(insn, 16, 5);
11347 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11348 tmp = fieldFromInstruction(insn, 5, 3);
11349 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11352 tmp = fieldFromInstruction(insn, 0, 5);
11353 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11354 tmp = fieldFromInstruction(insn, 8, 5);
11355 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11356 tmp = fieldFromInstruction(insn, 16, 5);
11357 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11358 tmp = fieldFromInstruction(insn, 5, 2);
11359 if (DecodeHvxQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11362 tmp = fieldFromInstruction(insn, 0, 5);
11363 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11364 tmp = fieldFromInstruction(insn, 5, 2);
11365 if (DecodeHvxQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11366 tmp = fieldFromInstruction(insn, 8, 5);
11367 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11368 tmp = fieldFromInstruction(insn, 16, 5);
11369 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11372 tmp = fieldFromInstruction(insn, 0, 5);
11373 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11374 tmp = fieldFromInstruction(insn, 8, 5);
11375 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11378 tmp = fieldFromInstruction(insn, 0, 5);
11379 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11380 tmp = fieldFromInstruction(insn, 8, 5);
11381 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11384 tmp = fieldFromInstruction(insn, 0, 2);
11385 if (DecodeHvxQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11386 tmp = fieldFromInstruction(insn, 8, 2);
11387 if (DecodeHvxQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11388 tmp = fieldFromInstruction(insn, 22, 2);
11389 if (DecodeHvxQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11392 tmp = fieldFromInstruction(insn, 0, 2);
11393 if (DecodeHvxQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11394 tmp = fieldFromInstruction(insn, 8, 2);
11395 if (DecodeHvxQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11398 tmp = fieldFromInstruction(insn, 0, 5);
11399 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11400 tmp = fieldFromInstruction(insn, 8, 5);
11401 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11402 tmp = fieldFromInstruction(insn, 16, 5);
11403 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11404 tmp = fieldFromInstruction(insn, 5, 3);
11405 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11408 tmp = fieldFromInstruction(insn, 0, 5);
11409 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11410 tmp = fieldFromInstruction(insn, 8, 5);
11411 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11412 tmp = fieldFromInstruction(insn, 16, 5);
11413 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11414 tmp = fieldFromInstruction(insn, 5, 3);
11415 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11418 tmp = fieldFromInstruction(insn, 0, 5);
11419 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11420 tmp = fieldFromInstruction(insn, 0, 5);
11421 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11422 tmp = fieldFromInstruction(insn, 8, 5);
11423 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11426 tmp = fieldFromInstruction(insn, 0, 5);
11427 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11428 tmp = fieldFromInstruction(insn, 22, 2);
11429 if (DecodeHvxQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11430 tmp = fieldFromInstruction(insn, 0, 5);
11431 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11432 tmp = fieldFromInstruction(insn, 8, 5);
11433 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11436 tmp = fieldFromInstruction(insn, 0, 5);
11437 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11438 tmp = fieldFromInstruction(insn, 22, 2);
11439 if (DecodeHvxQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11440 tmp = fieldFromInstruction(insn, 8, 5);
11441 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11444 tmp = fieldFromInstruction(insn, 0, 5);
11445 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11446 tmp = fieldFromInstruction(insn, 22, 2);
11447 if (DecodeHvxQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11450 tmp = fieldFromInstruction(insn, 8, 1);
11451 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11454 tmp = fieldFromInstruction(insn, 22, 2);
11455 if (DecodeHvxQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11458 tmp = fieldFromInstruction(insn, 22, 2);
11459 if (DecodeHvxQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11460 tmp = fieldFromInstruction(insn, 8, 1);
11461 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11464 tmp = fieldFromInstruction(insn, 0, 5);
11465 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11466 tmp = fieldFromInstruction(insn, 5, 2);
11467 if (DecodeHvxQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11468 tmp = fieldFromInstruction(insn, 8, 5);
11469 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11470 tmp = fieldFromInstruction(insn, 16, 5);
11471 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11474 tmp = fieldFromInstruction(insn, 0, 2);
11475 if (DecodeHvxQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11476 tmp = fieldFromInstruction(insn, 8, 5);
11477 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11478 tmp = fieldFromInstruction(insn, 16, 5);
11479 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11482 tmp = fieldFromInstruction(insn, 0, 5);
11483 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11484 tmp = fieldFromInstruction(insn, 16, 5);
11485 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11486 tmp = 0x0;
11487 tmp |= fieldFromInstruction(insn, 8, 3) << 0;
11488 tmp |= fieldFromInstruction(insn, 13, 1) << 3;
11489 if (s4_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11492 tmp = fieldFromInstruction(insn, 16, 5);
11493 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11494 tmp = 0x0;
11495 tmp |= fieldFromInstruction(insn, 8, 3) << 0;
11496 tmp |= fieldFromInstruction(insn, 13, 1) << 3;
11497 if (s4_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11498 tmp = fieldFromInstruction(insn, 0, 5);
11499 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11502 tmp = fieldFromInstruction(insn, 11, 2);
11503 if (DecodeHvxQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11504 tmp = fieldFromInstruction(insn, 16, 5);
11505 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11506 tmp = 0x0;
11507 tmp |= fieldFromInstruction(insn, 8, 3) << 0;
11508 tmp |= fieldFromInstruction(insn, 13, 1) << 3;
11509 if (s4_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11510 tmp = fieldFromInstruction(insn, 0, 5);
11511 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11514 tmp = fieldFromInstruction(insn, 11, 2);
11515 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11516 tmp = fieldFromInstruction(insn, 16, 5);
11517 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11518 tmp = 0x0;
11519 tmp |= fieldFromInstruction(insn, 8, 3) << 0;
11520 tmp |= fieldFromInstruction(insn, 13, 1) << 3;
11521 if (s4_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11522 tmp = fieldFromInstruction(insn, 0, 5);
11523 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11526 tmp = fieldFromInstruction(insn, 16, 5);
11527 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11528 tmp = 0x0;
11529 tmp |= fieldFromInstruction(insn, 8, 3) << 0;
11530 tmp |= fieldFromInstruction(insn, 13, 1) << 3;
11531 if (s4_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11532 tmp = fieldFromInstruction(insn, 0, 3);
11533 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11536 tmp = fieldFromInstruction(insn, 16, 5);
11537 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11538 tmp = 0x0;
11539 tmp |= fieldFromInstruction(insn, 8, 3) << 0;
11540 tmp |= fieldFromInstruction(insn, 13, 1) << 3;
11541 if (s4_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11544 tmp = fieldFromInstruction(insn, 0, 5);
11545 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11546 tmp = fieldFromInstruction(insn, 11, 2);
11547 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11548 tmp = fieldFromInstruction(insn, 16, 5);
11549 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11550 tmp = 0x0;
11551 tmp |= fieldFromInstruction(insn, 8, 3) << 0;
11552 tmp |= fieldFromInstruction(insn, 13, 1) << 3;
11553 if (s4_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11556 tmp = fieldFromInstruction(insn, 11, 2);
11557 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11558 tmp = fieldFromInstruction(insn, 16, 5);
11559 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11560 tmp = 0x0;
11561 tmp |= fieldFromInstruction(insn, 8, 3) << 0;
11562 tmp |= fieldFromInstruction(insn, 13, 1) << 3;
11563 if (s4_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11564 tmp = fieldFromInstruction(insn, 0, 3);
11565 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11568 tmp = fieldFromInstruction(insn, 0, 5);
11569 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11570 tmp = fieldFromInstruction(insn, 16, 5);
11571 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11572 tmp = fieldFromInstruction(insn, 16, 5);
11573 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11574 tmp = fieldFromInstruction(insn, 8, 3);
11575 if (s3_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11578 tmp = fieldFromInstruction(insn, 16, 5);
11579 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11580 tmp = fieldFromInstruction(insn, 16, 5);
11581 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11582 tmp = fieldFromInstruction(insn, 8, 3);
11583 if (s3_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11584 tmp = fieldFromInstruction(insn, 0, 5);
11585 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11588 tmp = fieldFromInstruction(insn, 16, 5);
11589 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11590 tmp = fieldFromInstruction(insn, 11, 2);
11591 if (DecodeHvxQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11592 tmp = fieldFromInstruction(insn, 16, 5);
11593 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11594 tmp = fieldFromInstruction(insn, 8, 3);
11595 if (s3_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11596 tmp = fieldFromInstruction(insn, 0, 5);
11597 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11600 tmp = fieldFromInstruction(insn, 16, 5);
11601 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11602 tmp = fieldFromInstruction(insn, 11, 2);
11603 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11604 tmp = fieldFromInstruction(insn, 16, 5);
11605 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11606 tmp = fieldFromInstruction(insn, 8, 3);
11607 if (s3_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11608 tmp = fieldFromInstruction(insn, 0, 5);
11609 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11612 tmp = fieldFromInstruction(insn, 16, 5);
11613 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11614 tmp = fieldFromInstruction(insn, 16, 5);
11615 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11616 tmp = fieldFromInstruction(insn, 8, 3);
11617 if (s3_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11618 tmp = fieldFromInstruction(insn, 0, 3);
11619 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11622 tmp = fieldFromInstruction(insn, 16, 5);
11623 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11624 tmp = fieldFromInstruction(insn, 16, 5);
11625 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11626 tmp = fieldFromInstruction(insn, 8, 3);
11627 if (s3_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11630 tmp = fieldFromInstruction(insn, 0, 5);
11631 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11632 tmp = fieldFromInstruction(insn, 16, 5);
11633 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11634 tmp = fieldFromInstruction(insn, 11, 2);
11635 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11636 tmp = fieldFromInstruction(insn, 16, 5);
11637 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11638 tmp = fieldFromInstruction(insn, 8, 3);
11639 if (s3_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11642 tmp = fieldFromInstruction(insn, 16, 5);
11643 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11644 tmp = fieldFromInstruction(insn, 11, 2);
11645 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11646 tmp = fieldFromInstruction(insn, 16, 5);
11647 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11648 tmp = fieldFromInstruction(insn, 8, 3);
11649 if (s3_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11650 tmp = fieldFromInstruction(insn, 0, 3);
11651 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11654 tmp = fieldFromInstruction(insn, 0, 5);
11655 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11656 tmp = fieldFromInstruction(insn, 16, 5);
11657 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11658 tmp = fieldFromInstruction(insn, 16, 5);
11659 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11660 tmp = fieldFromInstruction(insn, 13, 1);
11661 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11664 tmp = fieldFromInstruction(insn, 16, 5);
11665 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11666 tmp = fieldFromInstruction(insn, 16, 5);
11667 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11668 tmp = fieldFromInstruction(insn, 13, 1);
11669 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11670 tmp = fieldFromInstruction(insn, 0, 5);
11671 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11674 tmp = fieldFromInstruction(insn, 16, 5);
11675 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11676 tmp = fieldFromInstruction(insn, 11, 2);
11677 if (DecodeHvxQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11678 tmp = fieldFromInstruction(insn, 16, 5);
11679 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11680 tmp = fieldFromInstruction(insn, 13, 1);
11681 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11682 tmp = fieldFromInstruction(insn, 0, 5);
11683 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11686 tmp = fieldFromInstruction(insn, 16, 5);
11687 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11688 tmp = fieldFromInstruction(insn, 11, 2);
11689 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11690 tmp = fieldFromInstruction(insn, 16, 5);
11691 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11692 tmp = fieldFromInstruction(insn, 13, 1);
11693 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11694 tmp = fieldFromInstruction(insn, 0, 5);
11695 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11698 tmp = fieldFromInstruction(insn, 16, 5);
11699 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11700 tmp = fieldFromInstruction(insn, 16, 5);
11701 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11702 tmp = fieldFromInstruction(insn, 13, 1);
11703 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11704 tmp = fieldFromInstruction(insn, 0, 3);
11705 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11708 tmp = fieldFromInstruction(insn, 16, 5);
11709 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11710 tmp = fieldFromInstruction(insn, 16, 5);
11711 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11712 tmp = fieldFromInstruction(insn, 13, 1);
11713 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11716 tmp = fieldFromInstruction(insn, 0, 5);
11717 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11718 tmp = fieldFromInstruction(insn, 16, 5);
11719 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11720 tmp = fieldFromInstruction(insn, 11, 2);
11721 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11722 tmp = fieldFromInstruction(insn, 16, 5);
11723 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11724 tmp = fieldFromInstruction(insn, 13, 1);
11725 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11728 tmp = fieldFromInstruction(insn, 16, 5);
11729 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11730 tmp = fieldFromInstruction(insn, 11, 2);
11731 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11732 tmp = fieldFromInstruction(insn, 16, 5);
11733 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11734 tmp = fieldFromInstruction(insn, 13, 1);
11735 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11736 tmp = fieldFromInstruction(insn, 0, 3);
11737 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11740 tmp = fieldFromInstruction(insn, 11, 2);
11741 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11742 tmp = fieldFromInstruction(insn, 16, 5);
11743 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11744 tmp = 0x0;
11745 tmp |= fieldFromInstruction(insn, 8, 3) << 0;
11746 tmp |= fieldFromInstruction(insn, 13, 1) << 3;
11747 if (s4_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11750 tmp = fieldFromInstruction(insn, 16, 5);
11751 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11752 tmp = fieldFromInstruction(insn, 11, 2);
11753 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11754 tmp = fieldFromInstruction(insn, 16, 5);
11755 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11756 tmp = fieldFromInstruction(insn, 8, 3);
11757 if (s3_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11760 tmp = fieldFromInstruction(insn, 16, 5);
11761 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11762 tmp = fieldFromInstruction(insn, 11, 2);
11763 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11764 tmp = fieldFromInstruction(insn, 16, 5);
11765 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11766 tmp = fieldFromInstruction(insn, 13, 1);
11767 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11770 tmp = fieldFromInstruction(insn, 16, 5);
11771 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11772 tmp = fieldFromInstruction(insn, 13, 1);
11773 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11774 tmp = fieldFromInstruction(insn, 0, 5);
11775 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11778 tmp = fieldFromInstruction(insn, 16, 5);
11779 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11780 tmp = fieldFromInstruction(insn, 13, 1);
11781 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11782 tmp = fieldFromInstruction(insn, 0, 5);
11783 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11786 tmp = fieldFromInstruction(insn, 5, 2);
11787 if (DecodeHvxQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11788 tmp = fieldFromInstruction(insn, 16, 5);
11789 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11790 tmp = fieldFromInstruction(insn, 13, 1);
11791 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11792 tmp = fieldFromInstruction(insn, 0, 5);
11793 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11796 tmp = fieldFromInstruction(insn, 5, 2);
11797 if (DecodeHvxQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11798 tmp = fieldFromInstruction(insn, 16, 5);
11799 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11800 tmp = fieldFromInstruction(insn, 13, 1);
11801 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11802 tmp = fieldFromInstruction(insn, 0, 5);
11803 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11806 tmp = fieldFromInstruction(insn, 16, 5);
11807 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11808 tmp = fieldFromInstruction(insn, 13, 1);
11809 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11810 tmp = fieldFromInstruction(insn, 8, 5);
11811 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11812 tmp = fieldFromInstruction(insn, 0, 5);
11813 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11816 tmp = fieldFromInstruction(insn, 16, 5);
11817 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11818 tmp = fieldFromInstruction(insn, 13, 1);
11819 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11820 tmp = fieldFromInstruction(insn, 8, 5);
11821 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11822 tmp = fieldFromInstruction(insn, 0, 5);
11823 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11826 tmp = fieldFromInstruction(insn, 5, 2);
11827 if (DecodeHvxQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11828 tmp = fieldFromInstruction(insn, 16, 5);
11829 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11830 tmp = fieldFromInstruction(insn, 13, 1);
11831 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11832 tmp = fieldFromInstruction(insn, 8, 5);
11833 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11834 tmp = fieldFromInstruction(insn, 0, 5);
11835 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11838 tmp = fieldFromInstruction(insn, 5, 2);
11839 if (DecodeHvxQRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11840 tmp = fieldFromInstruction(insn, 16, 5);
11841 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11842 tmp = fieldFromInstruction(insn, 13, 1);
11843 if (DecodeModRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11844 tmp = fieldFromInstruction(insn, 8, 5);
11845 if (DecodeHvxWRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11846 tmp = fieldFromInstruction(insn, 0, 5);
11847 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11850 tmp = fieldFromInstruction(insn, 0, 5);
11851 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11852 tmp = fieldFromInstruction(insn, 8, 5);
11853 if (DecodeHvxVRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11854 tmp = fieldFromInstruction(insn, 16, 5);
11855 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11858 tmp = fieldFromInstruction(insn, 0, 5);
11859 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11860 tmp = fieldFromInstruction(insn, 16, 5);
11861 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11862 tmp = 0x0;
11863 tmp |= fieldFromInstruction(insn, 5, 2) << 0;
11864 tmp |= fieldFromInstruction(insn, 8, 4) << 2;
11865 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11868 tmp = fieldFromInstruction(insn, 0, 5);
11869 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11870 tmp = fieldFromInstruction(insn, 16, 5);
11871 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11872 tmp = 0x0;
11873 tmp |= fieldFromInstruction(insn, 7, 1) << 0;
11874 tmp |= fieldFromInstruction(insn, 13, 1) << 1;
11875 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11876 tmp = 0x0;
11877 tmp |= fieldFromInstruction(insn, 5, 2) << 0;
11878 tmp |= fieldFromInstruction(insn, 8, 4) << 2;
11879 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11882 tmp = fieldFromInstruction(insn, 0, 5);
11883 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11884 tmp = fieldFromInstruction(insn, 16, 5);
11885 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11886 tmp = fieldFromInstruction(insn, 0, 5);
11887 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11888 tmp = 0x0;
11889 tmp |= fieldFromInstruction(insn, 5, 2) << 0;
11890 tmp |= fieldFromInstruction(insn, 8, 4) << 2;
11891 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11894 tmp = fieldFromInstruction(insn, 0, 5);
11895 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11896 tmp = fieldFromInstruction(insn, 0, 5);
11897 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11898 tmp = fieldFromInstruction(insn, 16, 5);
11899 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11900 tmp = 0x0;
11901 tmp |= fieldFromInstruction(insn, 7, 1) << 0;
11902 tmp |= fieldFromInstruction(insn, 13, 1) << 1;
11903 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11904 tmp = 0x0;
11905 tmp |= fieldFromInstruction(insn, 5, 2) << 0;
11906 tmp |= fieldFromInstruction(insn, 8, 4) << 2;
11907 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11910 tmp = fieldFromInstruction(insn, 0, 5);
11911 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11912 tmp = fieldFromInstruction(insn, 16, 5);
11913 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11914 tmp = 0x0;
11915 tmp |= fieldFromInstruction(insn, 5, 2) << 0;
11916 tmp |= fieldFromInstruction(insn, 8, 4) << 2;
11917 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11920 tmp = fieldFromInstruction(insn, 0, 5);
11921 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11922 tmp = fieldFromInstruction(insn, 16, 5);
11923 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11924 tmp = 0x0;
11925 tmp |= fieldFromInstruction(insn, 7, 1) << 0;
11926 tmp |= fieldFromInstruction(insn, 13, 1) << 1;
11927 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11928 tmp = 0x0;
11929 tmp |= fieldFromInstruction(insn, 5, 2) << 0;
11930 tmp |= fieldFromInstruction(insn, 8, 4) << 2;
11931 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11934 tmp = fieldFromInstruction(insn, 0, 5);
11935 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11936 tmp = fieldFromInstruction(insn, 9, 2);
11937 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11938 tmp = 0x0;
11939 tmp |= fieldFromInstruction(insn, 8, 1) << 0;
11940 tmp |= fieldFromInstruction(insn, 16, 5) << 1;
11941 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11944 tmp = fieldFromInstruction(insn, 16, 5);
11945 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11946 tmp = fieldFromInstruction(insn, 0, 6);
11947 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11948 tmp = fieldFromInstruction(insn, 8, 5);
11949 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11952 tmp = fieldFromInstruction(insn, 16, 5);
11953 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11954 tmp = 0x0;
11955 tmp |= fieldFromInstruction(insn, 6, 1) << 0;
11956 tmp |= fieldFromInstruction(insn, 13, 1) << 1;
11957 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11958 tmp = fieldFromInstruction(insn, 0, 6);
11959 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11960 tmp = fieldFromInstruction(insn, 8, 5);
11961 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11964 tmp = fieldFromInstruction(insn, 0, 2);
11965 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11966 tmp = 0x0;
11967 tmp |= fieldFromInstruction(insn, 3, 4) << 0;
11968 tmp |= fieldFromInstruction(insn, 16, 2) << 4;
11969 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11970 tmp = fieldFromInstruction(insn, 8, 5);
11971 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11974 tmp = fieldFromInstruction(insn, 16, 5);
11975 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11976 tmp = fieldFromInstruction(insn, 0, 6);
11977 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11978 tmp = fieldFromInstruction(insn, 8, 3);
11979 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11982 tmp = fieldFromInstruction(insn, 16, 5);
11983 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11984 tmp = 0x0;
11985 tmp |= fieldFromInstruction(insn, 6, 1) << 0;
11986 tmp |= fieldFromInstruction(insn, 13, 1) << 1;
11987 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11988 tmp = fieldFromInstruction(insn, 0, 6);
11989 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11990 tmp = fieldFromInstruction(insn, 8, 3);
11991 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11994 tmp = fieldFromInstruction(insn, 0, 2);
11995 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
11996 tmp = 0x0;
11997 tmp |= fieldFromInstruction(insn, 3, 4) << 0;
11998 tmp |= fieldFromInstruction(insn, 16, 2) << 4;
11999 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12000 tmp = fieldFromInstruction(insn, 8, 3);
12001 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12004 tmp = fieldFromInstruction(insn, 0, 5);
12005 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12006 tmp = fieldFromInstruction(insn, 9, 2);
12007 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12008 tmp = 0x0;
12009 tmp |= fieldFromInstruction(insn, 8, 1) << 0;
12010 tmp |= fieldFromInstruction(insn, 16, 5) << 1;
12011 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12014 tmp = fieldFromInstruction(insn, 16, 5);
12015 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12016 tmp = fieldFromInstruction(insn, 0, 6);
12017 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12018 tmp = fieldFromInstruction(insn, 8, 5);
12019 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12022 tmp = fieldFromInstruction(insn, 16, 5);
12023 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12024 tmp = 0x0;
12025 tmp |= fieldFromInstruction(insn, 6, 1) << 0;
12026 tmp |= fieldFromInstruction(insn, 13, 1) << 1;
12027 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12028 tmp = fieldFromInstruction(insn, 0, 6);
12029 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12030 tmp = fieldFromInstruction(insn, 8, 5);
12031 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12034 tmp = fieldFromInstruction(insn, 0, 2);
12035 if (DecodePredRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12036 tmp = 0x0;
12037 tmp |= fieldFromInstruction(insn, 3, 4) << 0;
12038 tmp |= fieldFromInstruction(insn, 16, 2) << 4;
12039 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12040 tmp = fieldFromInstruction(insn, 8, 5);
12041 if (DecodeDoubleRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12044 tmp = fieldFromInstruction(insn, 0, 4);
12045 if (DecodeGeneralSubRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12046 tmp = fieldFromInstruction(insn, 0, 4);
12047 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12048 tmp = fieldFromInstruction(insn, 4, 7);
12049 if (s32_0ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12052 tmp = fieldFromInstruction(insn, 0, 4);
12053 if (DecodeGeneralSubRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12054 tmp = fieldFromInstruction(insn, 4, 6);
12055 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12058 tmp = fieldFromInstruction(insn, 0, 4);
12059 if (DecodeGeneralSubRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12060 tmp = fieldFromInstruction(insn, 4, 6) << 2;
12061 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12064 tmp = fieldFromInstruction(insn, 0, 4);
12065 if (DecodeGeneralSubRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12066 tmp = fieldFromInstruction(insn, 4, 4);
12067 if (DecodeGeneralSubRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12070 tmp = fieldFromInstruction(insn, 0, 4);
12071 if (DecodeGeneralSubRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12072 tmp = fieldFromInstruction(insn, 0, 4);
12073 if (DecodeIntRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12074 tmp = fieldFromInstruction(insn, 4, 4);
12075 if (DecodeGeneralSubRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12078 tmp = fieldFromInstruction(insn, 4, 4);
12079 if (DecodeGeneralSubRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12080 tmp = fieldFromInstruction(insn, 0, 2);
12081 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12084 tmp = fieldFromInstruction(insn, 0, 4);
12085 if (DecodeGeneralSubRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12088 tmp = fieldFromInstruction(insn, 0, 3);
12089 if (DecodeGeneralDoubleLow8RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12090 tmp = fieldFromInstruction(insn, 5, 2);
12091 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12094 tmp = fieldFromInstruction(insn, 0, 3);
12095 if (DecodeGeneralDoubleLow8RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12096 tmp = fieldFromInstruction(insn, 4, 4);
12097 if (DecodeGeneralSubRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12100 tmp = fieldFromInstruction(insn, 0, 4);
12101 if (DecodeGeneralSubRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12102 tmp = fieldFromInstruction(insn, 4, 4);
12103 if (DecodeGeneralSubRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12104 tmp = fieldFromInstruction(insn, 8, 4) << 2;
12105 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12108 tmp = fieldFromInstruction(insn, 0, 4);
12109 if (DecodeGeneralSubRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12110 tmp = fieldFromInstruction(insn, 4, 4);
12111 if (DecodeGeneralSubRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12112 tmp = fieldFromInstruction(insn, 8, 4);
12113 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12116 tmp = fieldFromInstruction(insn, 0, 4);
12117 if (DecodeGeneralSubRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12118 tmp = fieldFromInstruction(insn, 4, 4);
12119 if (DecodeGeneralSubRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12120 tmp = fieldFromInstruction(insn, 8, 3) << 1;
12121 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12124 tmp = fieldFromInstruction(insn, 0, 4);
12125 if (DecodeGeneralSubRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12126 tmp = fieldFromInstruction(insn, 4, 4);
12127 if (DecodeGeneralSubRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12128 tmp = fieldFromInstruction(insn, 8, 3);
12129 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12132 tmp = fieldFromInstruction(insn, 0, 4);
12133 if (DecodeGeneralSubRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12134 tmp = fieldFromInstruction(insn, 4, 5) << 2;
12135 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12138 tmp = fieldFromInstruction(insn, 0, 3);
12139 if (DecodeGeneralDoubleLow8RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12140 tmp = fieldFromInstruction(insn, 3, 5) << 3;
12141 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12144 tmp = fieldFromInstruction(insn, 4, 4);
12145 if (DecodeGeneralSubRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12146 tmp = fieldFromInstruction(insn, 8, 4) << 2;
12147 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12148 tmp = fieldFromInstruction(insn, 0, 4);
12149 if (DecodeGeneralSubRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12152 tmp = fieldFromInstruction(insn, 4, 4);
12153 if (DecodeGeneralSubRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12154 tmp = fieldFromInstruction(insn, 8, 4);
12155 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12156 tmp = fieldFromInstruction(insn, 0, 4);
12157 if (DecodeGeneralSubRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12160 tmp = fieldFromInstruction(insn, 4, 4);
12161 if (DecodeGeneralSubRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12162 tmp = fieldFromInstruction(insn, 8, 3) << 1;
12163 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12164 tmp = fieldFromInstruction(insn, 0, 4);
12165 if (DecodeGeneralSubRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12168 tmp = fieldFromInstruction(insn, 4, 5) << 2;
12169 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12170 tmp = fieldFromInstruction(insn, 0, 4);
12171 if (DecodeGeneralSubRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12174 tmp = fieldFromInstruction(insn, 3, 6) << 3;
12175 if (s6_3ImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12176 tmp = fieldFromInstruction(insn, 0, 3);
12177 if (DecodeGeneralDoubleLow8RegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12180 tmp = fieldFromInstruction(insn, 4, 4);
12181 if (DecodeGeneralSubRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12182 tmp = fieldFromInstruction(insn, 0, 4) << 2;
12183 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12186 tmp = fieldFromInstruction(insn, 4, 4);
12187 if (DecodeGeneralSubRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12188 tmp = fieldFromInstruction(insn, 0, 4);
12189 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
12192 tmp = fieldFromInstruction(insn, 4, 5) << 3;
12193 if (unsignedImmDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }