|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/Hexagon/HexagonGenAsmMatcher.inc 7580 { 0 /* */, Hexagon::C2_tfrrp, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_IntRegs }, },
gen/lib/Target/Hexagon/HexagonGenDAGISel.inc39568 /* 75657*/ OPC_MorphNodeTo1, TARGET_VAL(Hexagon::C2_tfrrp), 0,
59539 /*113752*/ OPC_MorphNodeTo1, TARGET_VAL(Hexagon::C2_tfrrp), 0|OPFL_Chain,
59548 /*113772*/ OPC_MorphNodeTo1, TARGET_VAL(Hexagon::C2_tfrrp), 0|OPFL_Chain,
59565 /*113808*/ OPC_MorphNodeTo1, TARGET_VAL(Hexagon::C2_tfrrp), 0|OPFL_Chain,
59574 /*113828*/ OPC_MorphNodeTo1, TARGET_VAL(Hexagon::C2_tfrrp), 0|OPFL_Chain,
gen/lib/Target/Hexagon/HexagonGenMCCodeEmitter.inc 9093 case Hexagon::C2_tfrrp: {
lib/Target/Hexagon/HexagonBitTracker.cpp 355 case C2_tfrrp: {
lib/Target/Hexagon/HexagonFrameLowering.cpp 1643 unsigned TfrOpc = (Opc == Hexagon::LDriw_pred) ? Hexagon::C2_tfrrp
lib/Target/Hexagon/HexagonGenPredicate.cpp 176 case C2_tfrrp:
lib/Target/Hexagon/HexagonISelDAGToDAG.cpp 800 SDNode *Pu = CurDAG->getMachineNode(Hexagon::C2_tfrrp, dl, MVT::v8i1,
lib/Target/Hexagon/HexagonISelLowering.cpp 2086 return getInstr(Hexagon::C2_tfrrp, dl, ResTy, Ext, DAG);
2515 return getInstr(Hexagon::C2_tfrrp, dl, VecTy, {Rs[0]}, DAG);
lib/Target/Hexagon/HexagonInstrInfo.cpp 836 BuildMI(MBB, I, DL, get(Hexagon::C2_tfrrp), DestReg)