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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/Hexagon/HexagonGenInstrInfo.inc 4823 { 1193, 3, 0, 4, 118, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801c04ULL, ImplicitList32, ImplicitList33, OperandInfo168, -1 ,nullptr }, // Inst #1193 = J4_cmpeq_fp1_jump_nt
4824 { 1194, 3, 0, 4, 118, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2007974801c04ULL, ImplicitList32, ImplicitList33, OperandInfo168, -1 ,nullptr }, // Inst #1194 = J4_cmpeq_fp1_jump_t
4829 { 1199, 3, 0, 4, 118, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801404ULL, ImplicitList32, ImplicitList33, OperandInfo168, -1 ,nullptr }, // Inst #1199 = J4_cmpeq_tp1_jump_nt
4830 { 1200, 3, 0, 4, 118, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2007974801404ULL, ImplicitList32, ImplicitList33, OperandInfo168, -1 ,nullptr }, // Inst #1200 = J4_cmpeq_tp1_jump_t
4835 { 1205, 3, 0, 4, 120, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801c04ULL, ImplicitList32, ImplicitList33, OperandInfo170, -1 ,nullptr }, // Inst #1205 = J4_cmpeqi_fp1_jump_nt
4836 { 1206, 3, 0, 4, 120, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2007974801c04ULL, ImplicitList32, ImplicitList33, OperandInfo170, -1 ,nullptr }, // Inst #1206 = J4_cmpeqi_fp1_jump_t
4841 { 1211, 3, 0, 4, 120, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801404ULL, ImplicitList32, ImplicitList33, OperandInfo170, -1 ,nullptr }, // Inst #1211 = J4_cmpeqi_tp1_jump_nt
4842 { 1212, 3, 0, 4, 120, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2007974801404ULL, ImplicitList32, ImplicitList33, OperandInfo170, -1 ,nullptr }, // Inst #1212 = J4_cmpeqi_tp1_jump_t
4847 { 1217, 3, 0, 4, 120, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801c04ULL, ImplicitList32, ImplicitList33, OperandInfo170, -1 ,nullptr }, // Inst #1217 = J4_cmpeqn1_fp1_jump_nt
4848 { 1218, 3, 0, 4, 120, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2007974801c04ULL, ImplicitList32, ImplicitList33, OperandInfo170, -1 ,nullptr }, // Inst #1218 = J4_cmpeqn1_fp1_jump_t
4853 { 1223, 3, 0, 4, 120, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801404ULL, ImplicitList32, ImplicitList33, OperandInfo170, -1 ,nullptr }, // Inst #1223 = J4_cmpeqn1_tp1_jump_nt
4854 { 1224, 3, 0, 4, 120, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2007974801404ULL, ImplicitList32, ImplicitList33, OperandInfo170, -1 ,nullptr }, // Inst #1224 = J4_cmpeqn1_tp1_jump_t
4859 { 1229, 3, 0, 4, 118, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801c04ULL, ImplicitList32, ImplicitList33, OperandInfo168, -1 ,nullptr }, // Inst #1229 = J4_cmpgt_fp1_jump_nt
4860 { 1230, 3, 0, 4, 118, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2007974801c04ULL, ImplicitList32, ImplicitList33, OperandInfo168, -1 ,nullptr }, // Inst #1230 = J4_cmpgt_fp1_jump_t
4865 { 1235, 3, 0, 4, 118, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801404ULL, ImplicitList32, ImplicitList33, OperandInfo168, -1 ,nullptr }, // Inst #1235 = J4_cmpgt_tp1_jump_nt
4866 { 1236, 3, 0, 4, 118, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2007974801404ULL, ImplicitList32, ImplicitList33, OperandInfo168, -1 ,nullptr }, // Inst #1236 = J4_cmpgt_tp1_jump_t
4871 { 1241, 3, 0, 4, 120, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801c04ULL, ImplicitList32, ImplicitList33, OperandInfo170, -1 ,nullptr }, // Inst #1241 = J4_cmpgti_fp1_jump_nt
4872 { 1242, 3, 0, 4, 120, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2007974801c04ULL, ImplicitList32, ImplicitList33, OperandInfo170, -1 ,nullptr }, // Inst #1242 = J4_cmpgti_fp1_jump_t
4877 { 1247, 3, 0, 4, 120, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801404ULL, ImplicitList32, ImplicitList33, OperandInfo170, -1 ,nullptr }, // Inst #1247 = J4_cmpgti_tp1_jump_nt
4878 { 1248, 3, 0, 4, 120, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2007974801404ULL, ImplicitList32, ImplicitList33, OperandInfo170, -1 ,nullptr }, // Inst #1248 = J4_cmpgti_tp1_jump_t
4883 { 1253, 3, 0, 4, 120, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801c04ULL, ImplicitList32, ImplicitList33, OperandInfo170, -1 ,nullptr }, // Inst #1253 = J4_cmpgtn1_fp1_jump_nt
4884 { 1254, 3, 0, 4, 120, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2007974801c04ULL, ImplicitList32, ImplicitList33, OperandInfo170, -1 ,nullptr }, // Inst #1254 = J4_cmpgtn1_fp1_jump_t
4889 { 1259, 3, 0, 4, 120, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801404ULL, ImplicitList32, ImplicitList33, OperandInfo170, -1 ,nullptr }, // Inst #1259 = J4_cmpgtn1_tp1_jump_nt
4890 { 1260, 3, 0, 4, 120, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2007974801404ULL, ImplicitList32, ImplicitList33, OperandInfo170, -1 ,nullptr }, // Inst #1260 = J4_cmpgtn1_tp1_jump_t
4895 { 1265, 3, 0, 4, 118, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801c04ULL, ImplicitList32, ImplicitList33, OperandInfo168, -1 ,nullptr }, // Inst #1265 = J4_cmpgtu_fp1_jump_nt
4896 { 1266, 3, 0, 4, 118, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2007974801c04ULL, ImplicitList32, ImplicitList33, OperandInfo168, -1 ,nullptr }, // Inst #1266 = J4_cmpgtu_fp1_jump_t
4901 { 1271, 3, 0, 4, 118, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801404ULL, ImplicitList32, ImplicitList33, OperandInfo168, -1 ,nullptr }, // Inst #1271 = J4_cmpgtu_tp1_jump_nt
4902 { 1272, 3, 0, 4, 118, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2007974801404ULL, ImplicitList32, ImplicitList33, OperandInfo168, -1 ,nullptr }, // Inst #1272 = J4_cmpgtu_tp1_jump_t
4907 { 1277, 3, 0, 4, 120, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801c04ULL, ImplicitList32, ImplicitList33, OperandInfo170, -1 ,nullptr }, // Inst #1277 = J4_cmpgtui_fp1_jump_nt
4908 { 1278, 3, 0, 4, 120, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2007974801c04ULL, ImplicitList32, ImplicitList33, OperandInfo170, -1 ,nullptr }, // Inst #1278 = J4_cmpgtui_fp1_jump_t
4913 { 1283, 3, 0, 4, 120, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801404ULL, ImplicitList32, ImplicitList33, OperandInfo170, -1 ,nullptr }, // Inst #1283 = J4_cmpgtui_tp1_jump_nt
4914 { 1284, 3, 0, 4, 120, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2007974801404ULL, ImplicitList32, ImplicitList33, OperandInfo170, -1 ,nullptr }, // Inst #1284 = J4_cmpgtui_tp1_jump_t
4930 { 1300, 2, 0, 4, 124, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7972801c04ULL, ImplicitList32, ImplicitList33, OperandInfo171, -1 ,nullptr }, // Inst #1300 = J4_tstbit0_fp1_jump_nt
4931 { 1301, 2, 0, 4, 124, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2007972801c04ULL, ImplicitList32, ImplicitList33, OperandInfo171, -1 ,nullptr }, // Inst #1301 = J4_tstbit0_fp1_jump_t
4936 { 1306, 2, 0, 4, 124, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7972801404ULL, ImplicitList32, ImplicitList33, OperandInfo171, -1 ,nullptr }, // Inst #1306 = J4_tstbit0_tp1_jump_nt
4937 { 1307, 2, 0, 4, 124, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2007972801404ULL, ImplicitList32, ImplicitList33, OperandInfo171, -1 ,nullptr }, // Inst #1307 = J4_tstbit0_tp1_jump_t