|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/Hexagon/HexagonGenAsmMatcher.inc 8396 { 0 /* */, Hexagon::L2_loadruhgp, Convert__Reg1_0__u31_1Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_GP, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_ }, },
gen/lib/Target/Hexagon/HexagonGenDAGISel.inc55333 /*104463*/ OPC_MorphNodeTo1, TARGET_VAL(Hexagon::L2_loadruhgp), 0|OPFL_Chain|OPFL_MemRefs,
55353 /*104499*/ OPC_MorphNodeTo1, TARGET_VAL(Hexagon::L2_loadruhgp), 0|OPFL_Chain|OPFL_MemRefs,
55718 /*105233*/ OPC_EmitNode1, TARGET_VAL(Hexagon::L2_loadruhgp), 0|OPFL_Chain|OPFL_MemRefs,
55964 /*105797*/ OPC_EmitNode1, TARGET_VAL(Hexagon::L2_loadruhgp), 0|OPFL_Chain|OPFL_MemRefs,
63056 /*120770*/ OPC_MorphNodeTo1, TARGET_VAL(Hexagon::L2_loadruhgp), 0|OPFL_Chain|OPFL_MemRefs,
gen/lib/Target/Hexagon/HexagonGenInstrInfo.inc17589 { Hexagon::L2_loadruhgp, Hexagon::L4_ploadruht_abs, Hexagon::L4_ploadruhf_abs },
gen/lib/Target/Hexagon/HexagonGenMCCodeEmitter.inc 4041 case Hexagon::L2_loadruhgp:
lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp 1931 Inst.setOpcode(Hexagon::L2_loadruhgp);
lib/Target/Hexagon/HexagonBitTracker.cpp 1143 case L2_loadruhgp:
lib/Target/Hexagon/HexagonInstrInfo.cpp 2922 case Hexagon::L2_loadruhgp:
4180 case Hexagon::L2_loadruhgp: