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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/Hexagon/HexagonGenInstrInfo.inc 4821 { 1191, 3, 0, 4, 118, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801c04ULL, ImplicitList30, ImplicitList31, OperandInfo168, -1 ,nullptr }, // Inst #1191 = J4_cmpeq_fp0_jump_nt
4822 { 1192, 3, 0, 4, 118, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2007974801c04ULL, ImplicitList30, ImplicitList31, OperandInfo168, -1 ,nullptr }, // Inst #1192 = J4_cmpeq_fp0_jump_t
4823 { 1193, 3, 0, 4, 118, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801c04ULL, ImplicitList32, ImplicitList33, OperandInfo168, -1 ,nullptr }, // Inst #1193 = J4_cmpeq_fp1_jump_nt
4824 { 1194, 3, 0, 4, 118, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2007974801c04ULL, ImplicitList32, ImplicitList33, OperandInfo168, -1 ,nullptr }, // Inst #1194 = J4_cmpeq_fp1_jump_t
4827 { 1197, 3, 0, 4, 118, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801404ULL, ImplicitList30, ImplicitList31, OperandInfo168, -1 ,nullptr }, // Inst #1197 = J4_cmpeq_tp0_jump_nt
4828 { 1198, 3, 0, 4, 118, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2007974801404ULL, ImplicitList30, ImplicitList31, OperandInfo168, -1 ,nullptr }, // Inst #1198 = J4_cmpeq_tp0_jump_t
4829 { 1199, 3, 0, 4, 118, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801404ULL, ImplicitList32, ImplicitList33, OperandInfo168, -1 ,nullptr }, // Inst #1199 = J4_cmpeq_tp1_jump_nt
4830 { 1200, 3, 0, 4, 118, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2007974801404ULL, ImplicitList32, ImplicitList33, OperandInfo168, -1 ,nullptr }, // Inst #1200 = J4_cmpeq_tp1_jump_t
4857 { 1227, 3, 0, 4, 118, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801c04ULL, ImplicitList30, ImplicitList31, OperandInfo168, -1 ,nullptr }, // Inst #1227 = J4_cmpgt_fp0_jump_nt
4858 { 1228, 3, 0, 4, 118, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2007974801c04ULL, ImplicitList30, ImplicitList31, OperandInfo168, -1 ,nullptr }, // Inst #1228 = J4_cmpgt_fp0_jump_t
4859 { 1229, 3, 0, 4, 118, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801c04ULL, ImplicitList32, ImplicitList33, OperandInfo168, -1 ,nullptr }, // Inst #1229 = J4_cmpgt_fp1_jump_nt
4860 { 1230, 3, 0, 4, 118, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2007974801c04ULL, ImplicitList32, ImplicitList33, OperandInfo168, -1 ,nullptr }, // Inst #1230 = J4_cmpgt_fp1_jump_t
4863 { 1233, 3, 0, 4, 118, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801404ULL, ImplicitList30, ImplicitList31, OperandInfo168, -1 ,nullptr }, // Inst #1233 = J4_cmpgt_tp0_jump_nt
4864 { 1234, 3, 0, 4, 118, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2007974801404ULL, ImplicitList30, ImplicitList31, OperandInfo168, -1 ,nullptr }, // Inst #1234 = J4_cmpgt_tp0_jump_t
4865 { 1235, 3, 0, 4, 118, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801404ULL, ImplicitList32, ImplicitList33, OperandInfo168, -1 ,nullptr }, // Inst #1235 = J4_cmpgt_tp1_jump_nt
4866 { 1236, 3, 0, 4, 118, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2007974801404ULL, ImplicitList32, ImplicitList33, OperandInfo168, -1 ,nullptr }, // Inst #1236 = J4_cmpgt_tp1_jump_t
4893 { 1263, 3, 0, 4, 118, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801c04ULL, ImplicitList30, ImplicitList31, OperandInfo168, -1 ,nullptr }, // Inst #1263 = J4_cmpgtu_fp0_jump_nt
4894 { 1264, 3, 0, 4, 118, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2007974801c04ULL, ImplicitList30, ImplicitList31, OperandInfo168, -1 ,nullptr }, // Inst #1264 = J4_cmpgtu_fp0_jump_t
4895 { 1265, 3, 0, 4, 118, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801c04ULL, ImplicitList32, ImplicitList33, OperandInfo168, -1 ,nullptr }, // Inst #1265 = J4_cmpgtu_fp1_jump_nt
4896 { 1266, 3, 0, 4, 118, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2007974801c04ULL, ImplicitList32, ImplicitList33, OperandInfo168, -1 ,nullptr }, // Inst #1266 = J4_cmpgtu_fp1_jump_t
4899 { 1269, 3, 0, 4, 118, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801404ULL, ImplicitList30, ImplicitList31, OperandInfo168, -1 ,nullptr }, // Inst #1269 = J4_cmpgtu_tp0_jump_nt
4900 { 1270, 3, 0, 4, 118, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2007974801404ULL, ImplicitList30, ImplicitList31, OperandInfo168, -1 ,nullptr }, // Inst #1270 = J4_cmpgtu_tp0_jump_t
4901 { 1271, 3, 0, 4, 118, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801404ULL, ImplicitList32, ImplicitList33, OperandInfo168, -1 ,nullptr }, // Inst #1271 = J4_cmpgtu_tp1_jump_nt
4902 { 1272, 3, 0, 4, 118, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2007974801404ULL, ImplicitList32, ImplicitList33, OperandInfo168, -1 ,nullptr }, // Inst #1272 = J4_cmpgtu_tp1_jump_t
4925 { 1295, 3, 1, 4, 122, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x5974808004ULL, nullptr, ImplicitList19, OperandInfo168, -1 ,nullptr }, // Inst #1295 = J4_jumpsetr
5994 { 2364, 3, 1, 4, 172, 0, 0x802bULL, nullptr, nullptr, OperandInfo168, -1 ,nullptr }, // Inst #2364 = SA1_dec
6011 { 2381, 3, 1, 4, 19, 0|(1ULL<<MCID::MayLoad), 0x6c000000802bULL, nullptr, nullptr, OperandInfo168, -1 ,nullptr }, // Inst #2381 = SL1_loadri_io
6012 { 2382, 3, 1, 4, 19, 0|(1ULL<<MCID::MayLoad), 0x2c000000802bULL, nullptr, nullptr, OperandInfo168, -1 ,nullptr }, // Inst #2382 = SL1_loadrub_io
6019 { 2389, 3, 1, 4, 19, 0|(1ULL<<MCID::MayLoad), 0x2c000000802bULL, nullptr, nullptr, OperandInfo168, -1 ,nullptr }, // Inst #2389 = SL2_loadrb_io
6021 { 2391, 3, 1, 4, 19, 0|(1ULL<<MCID::MayLoad), 0x4c000000802bULL, nullptr, nullptr, OperandInfo168, -1 ,nullptr }, // Inst #2391 = SL2_loadrh_io
6023 { 2393, 3, 1, 4, 19, 0|(1ULL<<MCID::MayLoad), 0x4c000000802bULL, nullptr, nullptr, OperandInfo168, -1 ,nullptr }, // Inst #2393 = SL2_loadruh_io