|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/Hexagon/HexagonGenInstrInfo.inc 3826 { 196, 3, 1, 4, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x1ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #196 = C2_cmplt
3827 { 197, 3, 1, 4, 10, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x1ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #197 = C2_cmpltu
3966 { 336, 3, 0, 4, 48, 0|(1ULL<<MCID::Pseudo), 0x27ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #336 = S2_pstorerbf_zomap
3967 { 337, 3, 0, 4, 49, 0|(1ULL<<MCID::Pseudo), 0x20027ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #337 = S2_pstorerbnewf_zomap
3968 { 338, 3, 0, 4, 49, 0|(1ULL<<MCID::Pseudo), 0x20027ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #338 = S2_pstorerbnewt_zomap
3969 { 339, 3, 0, 4, 48, 0|(1ULL<<MCID::Pseudo), 0x27ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #339 = S2_pstorerbt_zomap
3972 { 342, 3, 0, 4, 48, 0|(1ULL<<MCID::Pseudo), 0x27ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #342 = S2_pstorerff_zomap
3973 { 343, 3, 0, 4, 48, 0|(1ULL<<MCID::Pseudo), 0x27ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #343 = S2_pstorerft_zomap
3974 { 344, 3, 0, 4, 48, 0|(1ULL<<MCID::Pseudo), 0x27ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #344 = S2_pstorerhf_zomap
3975 { 345, 3, 0, 4, 49, 0|(1ULL<<MCID::Pseudo), 0x20027ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #345 = S2_pstorerhnewf_zomap
3976 { 346, 3, 0, 4, 49, 0|(1ULL<<MCID::Pseudo), 0x20027ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #346 = S2_pstorerhnewt_zomap
3977 { 347, 3, 0, 4, 48, 0|(1ULL<<MCID::Pseudo), 0x27ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #347 = S2_pstorerht_zomap
3978 { 348, 3, 0, 4, 48, 0|(1ULL<<MCID::Pseudo), 0x27ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #348 = S2_pstorerif_zomap
3979 { 349, 3, 0, 4, 49, 0|(1ULL<<MCID::Pseudo), 0x20027ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #349 = S2_pstorerinewf_zomap
3980 { 350, 3, 0, 4, 49, 0|(1ULL<<MCID::Pseudo), 0x20027ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #350 = S2_pstorerinewt_zomap
3981 { 351, 3, 0, 4, 48, 0|(1ULL<<MCID::Pseudo), 0x27ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #351 = S2_pstorerit_zomap
3994 { 364, 3, 0, 4, 37, 0|(1ULL<<MCID::Pseudo), 0x27ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #364 = S4_pstorerbfnew_zomap
3995 { 365, 3, 0, 4, 53, 0|(1ULL<<MCID::Pseudo), 0x20027ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #365 = S4_pstorerbnewfnew_zomap
3996 { 366, 3, 0, 4, 53, 0|(1ULL<<MCID::Pseudo), 0x20027ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #366 = S4_pstorerbnewtnew_zomap
3997 { 367, 3, 0, 4, 37, 0|(1ULL<<MCID::Pseudo), 0x27ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #367 = S4_pstorerbtnew_zomap
4000 { 370, 3, 0, 4, 37, 0|(1ULL<<MCID::Pseudo), 0x27ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #370 = S4_pstorerffnew_zomap
4001 { 371, 3, 0, 4, 37, 0|(1ULL<<MCID::Pseudo), 0x27ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #371 = S4_pstorerftnew_zomap
4002 { 372, 3, 0, 4, 37, 0|(1ULL<<MCID::Pseudo), 0x27ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #372 = S4_pstorerhfnew_zomap
4003 { 373, 3, 0, 4, 53, 0|(1ULL<<MCID::Pseudo), 0x20027ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #373 = S4_pstorerhnewfnew_zomap
4004 { 374, 3, 0, 4, 53, 0|(1ULL<<MCID::Pseudo), 0x20027ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #374 = S4_pstorerhnewtnew_zomap
4005 { 375, 3, 0, 4, 37, 0|(1ULL<<MCID::Pseudo), 0x27ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #375 = S4_pstorerhtnew_zomap
4006 { 376, 3, 0, 4, 37, 0|(1ULL<<MCID::Pseudo), 0x27ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #376 = S4_pstorerifnew_zomap
4007 { 377, 3, 0, 4, 53, 0|(1ULL<<MCID::Pseudo), 0x20027ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #377 = S4_pstorerinewfnew_zomap
4008 { 378, 3, 0, 4, 53, 0|(1ULL<<MCID::Pseudo), 0x20027ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #378 = S4_pstorerinewtnew_zomap
4009 { 379, 3, 0, 4, 37, 0|(1ULL<<MCID::Pseudo), 0x27ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #379 = S4_pstoreritnew_zomap
4551 { 921, 3, 1, 4, 9, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable), 0x2dULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #921 = A4_cmpbeq
4553 { 923, 3, 1, 4, 9, 0|(1ULL<<MCID::Compare), 0x2dULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #923 = A4_cmpbgt
4555 { 925, 3, 1, 4, 9, 0|(1ULL<<MCID::Compare), 0x2dULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #925 = A4_cmpbgtu
4557 { 927, 3, 1, 4, 9, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable), 0x2dULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #927 = A4_cmpheq
4559 { 929, 3, 1, 4, 9, 0|(1ULL<<MCID::Compare), 0x2dULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #929 = A4_cmphgt
4561 { 931, 3, 1, 4, 9, 0|(1ULL<<MCID::Compare), 0x2dULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #931 = A4_cmphgtu
4635 { 1005, 3, 1, 4, 9, 0, 0x2dULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #1005 = C2_bitsclr
4637 { 1007, 3, 1, 4, 9, 0, 0x2dULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #1007 = C2_bitsset
4646 { 1016, 3, 1, 4, 86, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable), 0x1ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #1016 = C2_cmpeq
4649 { 1019, 3, 1, 4, 86, 0|(1ULL<<MCID::Compare), 0x1ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #1019 = C2_cmpgt
4652 { 1022, 3, 1, 4, 86, 0|(1ULL<<MCID::Compare), 0x1ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #1022 = C2_cmpgtu
4673 { 1043, 3, 1, 4, 86, 0|(1ULL<<MCID::Compare), 0x1ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #1043 = C4_cmplte
4675 { 1045, 3, 1, 4, 86, 0|(1ULL<<MCID::Compare), 0x1ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #1045 = C4_cmplteu
4677 { 1047, 3, 1, 4, 86, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable), 0x1ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #1047 = C4_cmpneq
4681 { 1051, 3, 1, 4, 9, 0, 0x2dULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #1051 = C4_nbitsclr
4683 { 1053, 3, 1, 4, 9, 0, 0x2dULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #1053 = C4_nbitsset
4745 { 1115, 3, 1, 4, 9, 0|(1ULL<<MCID::Compare), 0x400000000002dULL, ImplicitList23, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #1115 = F2_sfcmpeq
4746 { 1116, 3, 1, 4, 9, 0|(1ULL<<MCID::Compare), 0x400000000002dULL, ImplicitList23, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #1116 = F2_sfcmpge
4747 { 1117, 3, 1, 4, 9, 0|(1ULL<<MCID::Compare), 0x400000000002dULL, ImplicitList23, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #1117 = F2_sfcmpgt
4748 { 1118, 3, 1, 4, 9, 0|(1ULL<<MCID::Compare), 0x400000000002dULL, ImplicitList23, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #1118 = F2_sfcmpuo
5770 { 2140, 3, 1, 4, 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x60000000212aULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #2140 = S2_storew_locked
5780 { 2150, 3, 1, 4, 9, 0, 0x2dULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #2150 = S2_tstbit_r
5822 { 2192, 3, 1, 4, 9, 0, 0x2dULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #2192 = S4_ntstbit_r