|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/Hexagon/HexagonGenAsmMatcher.inc 8072 { 0 /* */, Hexagon::S2_lsr_i_p, Convert__Reg1_0__Reg1_4__u6_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, },
gen/lib/Target/Hexagon/HexagonGenDAGISel.inc32455 /* 62816*/ OPC_MorphNodeTo1, TARGET_VAL(Hexagon::S2_lsr_i_p), 0,
32462 /* 62828*/ OPC_MorphNodeTo1, TARGET_VAL(Hexagon::S2_lsr_i_p), 0,
63593 /*121842*/ OPC_EmitNode1, TARGET_VAL(Hexagon::S2_lsr_i_p), 0,
63611 /*121892*/ OPC_EmitNode1, TARGET_VAL(Hexagon::S2_lsr_i_p), 0,
63810 /*122350*/ OPC_EmitNode1, TARGET_VAL(Hexagon::S2_lsr_i_p), 0,
63829 /*122401*/ OPC_EmitNode1, TARGET_VAL(Hexagon::S2_lsr_i_p), 0,
66226 /*127343*/ OPC_MorphNodeTo1, TARGET_VAL(Hexagon::S2_lsr_i_p), 0,
67532 /*129954*/ OPC_EmitNode1, TARGET_VAL(Hexagon::S2_lsr_i_p), 0,
67559 /*130056*/ OPC_EmitNode1, TARGET_VAL(Hexagon::S2_lsr_i_p), 0,
67578 /*130128*/ OPC_EmitNode1, TARGET_VAL(Hexagon::S2_lsr_i_p), 0,
67775 /*130826*/ OPC_EmitNode1, TARGET_VAL(Hexagon::S2_lsr_i_p), 0,
67802 /*130928*/ OPC_EmitNode1, TARGET_VAL(Hexagon::S2_lsr_i_p), 0,
67821 /*131000*/ OPC_EmitNode1, TARGET_VAL(Hexagon::S2_lsr_i_p), 0,
gen/lib/Target/Hexagon/HexagonGenMCCodeEmitter.inc 6209 case Hexagon::S2_lsr_i_p:
lib/Target/Hexagon/HexagonBitSimplify.cpp 1146 case S2_lsr_i_p:
2986 case Hexagon::S2_lsr_i_p:
lib/Target/Hexagon/HexagonBitTracker.cpp 662 case S2_lsr_i_p:
lib/Target/Hexagon/HexagonPeephole.cpp 170 if (MI.getOpcode() == Hexagon::S2_lsr_i_p) {
lib/Target/Hexagon/HexagonSplitDouble.cpp 206 case Hexagon::S2_lsr_i_p:
388 case Hexagon::S2_lsr_i_p:
796 bool Right = (Opc == S2_lsr_i_p || Opc == S2_asr_i_p);
1059 case S2_lsr_i_p: