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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/Hexagon/HexagonGenAsmMatcher.inc 8825 { 0 /* */, Hexagon::S4_addi_lsr_ri, Convert__Reg1_0__u32_0Imm1_5__Tie0_0_8__u5_0Imm1_10, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_ }, },
gen/lib/Target/Hexagon/HexagonGenDAGISel.inc24710 /* 47511*/ OPC_MorphNodeTo1, TARGET_VAL(Hexagon::S4_addi_lsr_ri), 0,
24749 /* 47583*/ OPC_MorphNodeTo1, TARGET_VAL(Hexagon::S4_addi_lsr_ri), 0,
31746 /* 61554*/ OPC_MorphNodeTo1, TARGET_VAL(Hexagon::S4_addi_lsr_ri), 0,
gen/lib/Target/Hexagon/HexagonGenMCCodeEmitter.inc 3677 case Hexagon::S4_addi_lsr_ri:
lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp 1327 case Hexagon::S4_addi_lsr_ri:
lib/Target/Hexagon/HexagonBitSimplify.cpp 1169 case S4_addi_lsr_ri:
lib/Target/Hexagon/HexagonBitTracker.cpp 386 case S4_addi_lsr_ri: {
lib/Target/Hexagon/HexagonConstExtenders.cpp 1008 case Hexagon::S4_addi_lsr_ri: return Hexagon::S2_lsr_i_r_acc; // T -> T