reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
321 tmp = fieldFromInstruction(insn, 23, 5); 322 if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; } 323 tmp = fieldFromInstruction(insn, 18, 5); 324 if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; } 325 tmp = fieldFromInstruction(insn, 0, 16); 326 MI.addOperand(MCOperand::createImm(tmp)); 329 tmp = fieldFromInstruction(insn, 23, 5); 330 if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; } 331 tmp = fieldFromInstruction(insn, 18, 5); 332 if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; } 333 tmp = fieldFromInstruction(insn, 0, 16); 334 if (decodeShiftImm(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; } 337 tmp = fieldFromInstruction(insn, 23, 5); 338 if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; } 339 tmp = 0x0; 340 tmp |= fieldFromInstruction(insn, 0, 16) << 0; 341 tmp |= fieldFromInstruction(insn, 18, 5) << 18; 342 if (decodeRiMemoryValue(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; } 345 tmp = fieldFromInstruction(insn, 23, 5); 346 if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; } 347 tmp = 0x0; 348 tmp |= fieldFromInstruction(insn, 3, 8) << 0; 349 tmp |= fieldFromInstruction(insn, 11, 5) << 10; 350 tmp |= fieldFromInstruction(insn, 18, 5) << 15; 351 if (decodeRrMemoryValue(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; } 354 tmp = fieldFromInstruction(insn, 23, 5); 355 if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; } 356 tmp = fieldFromInstruction(insn, 18, 5); 357 if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; } 358 tmp = fieldFromInstruction(insn, 11, 5); 359 if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; } 360 tmp = 0x0; 361 tmp |= fieldFromInstruction(insn, 0, 3) << 1; 362 tmp |= fieldFromInstruction(insn, 16, 1) << 0; 363 if (decodePredicateOperand(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; } 366 tmp = fieldFromInstruction(insn, 11, 5); 367 if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; } 370 tmp = fieldFromInstruction(insn, 18, 5); 371 if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; } 372 tmp = 0x0; 373 tmp |= fieldFromInstruction(insn, 0, 3) << 1; 374 tmp |= fieldFromInstruction(insn, 16, 1) << 0; 375 MI.addOperand(MCOperand::createImm(tmp)); 378 tmp = fieldFromInstruction(insn, 18, 5); 379 if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; } 380 tmp = fieldFromInstruction(insn, 11, 5); 381 if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; } 382 tmp = 0x0; 383 tmp |= fieldFromInstruction(insn, 0, 3) << 1; 384 tmp |= fieldFromInstruction(insn, 16, 1) << 0; 385 MI.addOperand(MCOperand::createImm(tmp)); 388 tmp = fieldFromInstruction(insn, 23, 5); 389 if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; } 390 tmp = fieldFromInstruction(insn, 18, 5); 391 if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; } 392 tmp = fieldFromInstruction(insn, 11, 5); 393 if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; } 394 tmp = 0x0; 395 tmp |= fieldFromInstruction(insn, 0, 3) << 1; 396 tmp |= fieldFromInstruction(insn, 16, 1) << 0; 397 MI.addOperand(MCOperand::createImm(tmp)); 400 tmp = fieldFromInstruction(insn, 23, 5); 401 if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; } 402 tmp = fieldFromInstruction(insn, 18, 5); 403 if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; } 406 tmp = fieldFromInstruction(insn, 2, 23) << 2; 407 if (decodeBranch(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; } 410 tmp = fieldFromInstruction(insn, 2, 23) << 2; 411 if (decodeBranch(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; } 412 tmp = 0x0; 413 tmp |= fieldFromInstruction(insn, 0, 1) << 0; 414 tmp |= fieldFromInstruction(insn, 25, 3) << 1; 415 MI.addOperand(MCOperand::createImm(tmp)); 418 tmp = fieldFromInstruction(insn, 18, 5); 419 if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; } 420 tmp = 0x0; 421 tmp |= fieldFromInstruction(insn, 0, 1) << 0; 422 tmp |= fieldFromInstruction(insn, 25, 3) << 1; 423 MI.addOperand(MCOperand::createImm(tmp)); 426 tmp = fieldFromInstruction(insn, 2, 14) << 2; 427 MI.addOperand(MCOperand::createImm(tmp)); 428 tmp = 0x0; 429 tmp |= fieldFromInstruction(insn, 0, 1) << 0; 430 tmp |= fieldFromInstruction(insn, 25, 3) << 1; 431 MI.addOperand(MCOperand::createImm(tmp)); 434 tmp = fieldFromInstruction(insn, 23, 5); 435 if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; } 436 tmp = 0x0; 437 tmp |= fieldFromInstruction(insn, 0, 16) << 0; 438 tmp |= fieldFromInstruction(insn, 18, 5) << 16; 439 MI.addOperand(MCOperand::createImm(tmp)); 442 tmp = fieldFromInstruction(insn, 23, 5); 443 if (DecodeGPRRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; } 444 tmp = 0x0; 445 tmp |= fieldFromInstruction(insn, 0, 10) << 0; 446 tmp |= fieldFromInstruction(insn, 18, 5) << 12; 447 if (decodeSplsValue(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }