|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/MSP430/MSP430GenAsmMatcher.inc 577 case MSP430::SP: OpKind = MCK_GR16; break;
gen/lib/Target/MSP430/MSP430GenInstrInfo.inc 559 static const MCPhysReg ImplicitList2[] = { MSP430::SP, 0 };
560 static const MCPhysReg ImplicitList3[] = { MSP430::SP, MSP430::SR, 0 };
gen/lib/Target/MSP430/MSP430GenRegisterInfo.inc 226 MSP430::R12, MSP430::R13, MSP430::R14, MSP430::R15, MSP430::R11, MSP430::R10, MSP430::R9, MSP430::R8, MSP430::R7, MSP430::R6, MSP430::R5, MSP430::FP, MSP430::PC, MSP430::SP, MSP430::SR, MSP430::CG,
lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp 545 case MSP430::SP: return MSP430::SPB;
lib/Target/MSP430/Disassembler/MSP430Disassembler.cpp 89 MSP430::PC, MSP430::SP, MSP430::SR, MSP430::CG,
lib/Target/MSP430/MSP430FrameLowering.cpp 71 .addReg(MSP430::SP);
98 BuildMI(MBB, MBBI, DL, TII.get(MSP430::SUB16ri), MSP430::SP)
99 .addReg(MSP430::SP).addImm(NumBytes);
157 TII.get(MSP430::MOV16rr), MSP430::SP).addReg(MSP430::FP);
161 TII.get(MSP430::SUB16ri), MSP430::SP)
162 .addReg(MSP430::SP).addImm(CSSize);
170 BuildMI(MBB, MBBI, DL, TII.get(MSP430::ADD16ri), MSP430::SP)
171 .addReg(MSP430::SP).addImm(NumBytes);
248 BuildMI(MF, Old.getDebugLoc(), TII.get(MSP430::SUB16ri), MSP430::SP)
249 .addReg(MSP430::SP)
257 MSP430::SP)
258 .addReg(MSP430::SP)
276 BuildMI(MF, Old.getDebugLoc(), TII.get(MSP430::SUB16ri), MSP430::SP)
277 .addReg(MSP430::SP)
lib/Target/MSP430/MSP430ISelLowering.cpp 52 setStackPointerRegisterToSaveRestore(MSP430::SP);
839 StackPtr = DAG.getCopyFromReg(Chain, dl, MSP430::SP, PtrVT);
lib/Target/MSP430/MSP430RegisterInfo.cpp 83 Reserved.set(MSP430::SP);
115 unsigned BasePtr = (TFI->hasFP(MF) ? MSP430::FP : MSP430::SP);
159 return TFI->hasFP(MF) ? MSP430::FP : MSP430::SP;