reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
6271 { 3115 /* daddi */, Mips::DADDi, Convert__GPR64AsmReg1_0__GPR64AsmReg1_0__SImm161_1, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6, { MCK_GPR64AsmReg, MCK_SImm16 }, }, 6272 { 3115 /* daddi */, Mips::DADDi, Convert__GPR64AsmReg1_0__GPR64AsmReg1_1__SImm161_2, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6, { MCK_GPR64AsmReg, MCK_GPR64AsmReg, MCK_SImm16 }, }, 6387 { 3403 /* dmul */, Mips::DMULImmMacro, Convert__GPR64AsmReg1_0__GPR64AsmReg1_1__SImm32_Relaxed1_2, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6, { MCK_GPR64AsmReg, MCK_GPR64AsmReg, MCK_SImm32_Relaxed }, }, 6388 { 3408 /* dmulo */, Mips::DMULOMacro, Convert__GPR64AsmReg1_0__GPR64AsmReg1_1__GPR64AsmReg1_2, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6, { MCK_GPR64AsmReg, MCK_GPR64AsmReg, MCK_GPR64AsmReg }, }, 6389 { 3414 /* dmulou */, Mips::DMULOUMacro, Convert__GPR64AsmReg1_0__GPR64AsmReg1_1__GPR64AsmReg1_2, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6, { MCK_GPR64AsmReg, MCK_GPR64AsmReg, MCK_GPR64AsmReg }, }, 6493 { 3920 /* dsub */, Mips::DADDi, Convert__GPR64AsmReg1_0__GPR64AsmReg1_0__InvNum1_1, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6, { MCK_GPR64AsmReg, MCK_InvNum }, }, 6495 { 3920 /* dsub */, Mips::DADDi, Convert__GPR64AsmReg1_0__GPR64AsmReg1_1__InvNum1_2, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6, { MCK_GPR64AsmReg, MCK_GPR64AsmReg, MCK_InvNum }, }, 6496 { 3925 /* dsubi */, Mips::DADDi, Convert__GPR64AsmReg1_0__GPR64AsmReg1_0__InvNum1_1, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6, { MCK_GPR64AsmReg, MCK_InvNum }, }, 6497 { 3925 /* dsubi */, Mips::DADDi, Convert__GPR64AsmReg1_0__GPR64AsmReg1_1__InvNum1_2, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6, { MCK_GPR64AsmReg, MCK_GPR64AsmReg, MCK_InvNum }, }, 6824 { 5516 /* ldl */, Mips::LDL, Convert__GPR64AsmReg1_0__Mem2_1__Tie0_1_1, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6, { MCK_GPR64AsmReg, MCK_Mem }, }, 6826 { 5525 /* ldr */, Mips::LDR, Convert__GPR64AsmReg1_0__Mem2_1__Tie0_1_1, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6, { MCK_GPR64AsmReg, MCK_Mem }, }, 7513 { 7923 /* scd */, Mips::SCD, Convert__GPR64AsmReg1_0__Tie0_1_1__Mem2_1, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6, { MCK_GPR64AsmReg, MCK_Mem }, }, 7535 { 7963 /* sdl */, Mips::SDL, Convert__GPR64AsmReg1_0__Mem2_1, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6, { MCK_GPR64AsmReg, MCK_Mem }, }, 7536 { 7967 /* sdr */, Mips::SDR, Convert__GPR64AsmReg1_0__Mem2_1, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6, { MCK_GPR64AsmReg, MCK_Mem }, }, 9463 { 3115 /* daddi */, 1 /* 0 */, MCK_GPR64AsmReg, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6 }, 9464 { 3115 /* daddi */, 3 /* 0, 1 */, MCK_GPR64AsmReg, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6 }, 9590 { 3403 /* dmul */, 3 /* 0, 1 */, MCK_GPR64AsmReg, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6 }, 9591 { 3408 /* dmulo */, 7 /* 0, 1, 2 */, MCK_GPR64AsmReg, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6 }, 9592 { 3414 /* dmulou */, 7 /* 0, 1, 2 */, MCK_GPR64AsmReg, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6 }, 9737 { 3920 /* dsub */, 1 /* 0 */, MCK_GPR64AsmReg, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6 }, 9738 { 3920 /* dsub */, 2 /* 1 */, MCK_InvNum, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6 }, 9740 { 3920 /* dsub */, 3 /* 0, 1 */, MCK_GPR64AsmReg, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6 }, 9741 { 3920 /* dsub */, 4 /* 2 */, MCK_InvNum, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6 }, 9742 { 3925 /* dsubi */, 1 /* 0 */, MCK_GPR64AsmReg, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6 }, 9743 { 3925 /* dsubi */, 2 /* 1 */, MCK_InvNum, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6 }, 9744 { 3925 /* dsubi */, 3 /* 0, 1 */, MCK_GPR64AsmReg, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6 }, 9745 { 3925 /* dsubi */, 4 /* 2 */, MCK_InvNum, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6 }, 10116 { 5516 /* ldl */, 1 /* 0 */, MCK_GPR64AsmReg, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6 }, 10117 { 5516 /* ldl */, 2 /* 1 */, MCK_Mem, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6 }, 10120 { 5525 /* ldr */, 1 /* 0 */, MCK_GPR64AsmReg, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6 }, 10121 { 5525 /* ldr */, 2 /* 1 */, MCK_Mem, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6 }, 11004 { 7923 /* scd */, 1 /* 0 */, MCK_GPR64AsmReg, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6 }, 11005 { 7923 /* scd */, 2 /* 1 */, MCK_Mem, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6 }, 11030 { 7963 /* sdl */, 1 /* 0 */, MCK_GPR64AsmReg, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6 }, 11031 { 7963 /* sdl */, 2 /* 1 */, MCK_Mem, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6 }, 11032 { 7967 /* sdr */, 1 /* 0 */, MCK_GPR64AsmReg, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6 }, 11033 { 7967 /* sdr */, 2 /* 1 */, MCK_Mem, AMFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6 },