|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/Mips/MipsGenAsmMatcher.inc 5850 { 1718 /* c.eq.d */, Mips::C_EQ_D32_MM, Convert__regFCC0__AFGR64AsmReg1_0__AFGR64AsmReg1_1, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_AFGR64AsmReg, MCK_AFGR64AsmReg }, },
5854 { 1718 /* c.eq.d */, Mips::C_EQ_D32_MM, Convert__FCCAsmReg1_0__AFGR64AsmReg1_1__AFGR64AsmReg1_2, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_FCCAsmReg, MCK_AFGR64AsmReg, MCK_AFGR64AsmReg }, },
5862 { 1732 /* c.f.d */, Mips::C_F_D32_MM, Convert__regFCC0__AFGR64AsmReg1_0__AFGR64AsmReg1_1, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_AFGR64AsmReg, MCK_AFGR64AsmReg }, },
5866 { 1732 /* c.f.d */, Mips::C_F_D32_MM, Convert__FCCAsmReg1_0__AFGR64AsmReg1_1__AFGR64AsmReg1_2, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_FCCAsmReg, MCK_AFGR64AsmReg, MCK_AFGR64AsmReg }, },
5874 { 1744 /* c.le.d */, Mips::C_LE_D32_MM, Convert__regFCC0__AFGR64AsmReg1_0__AFGR64AsmReg1_1, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_AFGR64AsmReg, MCK_AFGR64AsmReg }, },
5878 { 1744 /* c.le.d */, Mips::C_LE_D32_MM, Convert__FCCAsmReg1_0__AFGR64AsmReg1_1__AFGR64AsmReg1_2, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_FCCAsmReg, MCK_AFGR64AsmReg, MCK_AFGR64AsmReg }, },
5886 { 1758 /* c.lt.d */, Mips::C_LT_D32_MM, Convert__regFCC0__AFGR64AsmReg1_0__AFGR64AsmReg1_1, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_AFGR64AsmReg, MCK_AFGR64AsmReg }, },
5890 { 1758 /* c.lt.d */, Mips::C_LT_D32_MM, Convert__FCCAsmReg1_0__AFGR64AsmReg1_1__AFGR64AsmReg1_2, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_FCCAsmReg, MCK_AFGR64AsmReg, MCK_AFGR64AsmReg }, },
5898 { 1772 /* c.nge.d */, Mips::C_NGE_D32_MM, Convert__regFCC0__AFGR64AsmReg1_0__AFGR64AsmReg1_1, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_AFGR64AsmReg, MCK_AFGR64AsmReg }, },
5902 { 1772 /* c.nge.d */, Mips::C_NGE_D32_MM, Convert__FCCAsmReg1_0__AFGR64AsmReg1_1__AFGR64AsmReg1_2, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_FCCAsmReg, MCK_AFGR64AsmReg, MCK_AFGR64AsmReg }, },
5910 { 1788 /* c.ngl.d */, Mips::C_NGL_D32_MM, Convert__regFCC0__AFGR64AsmReg1_0__AFGR64AsmReg1_1, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_AFGR64AsmReg, MCK_AFGR64AsmReg }, },
5914 { 1788 /* c.ngl.d */, Mips::C_NGL_D32_MM, Convert__FCCAsmReg1_0__AFGR64AsmReg1_1__AFGR64AsmReg1_2, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_FCCAsmReg, MCK_AFGR64AsmReg, MCK_AFGR64AsmReg }, },
5922 { 1804 /* c.ngle.d */, Mips::C_NGLE_D32_MM, Convert__regFCC0__AFGR64AsmReg1_0__AFGR64AsmReg1_1, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_AFGR64AsmReg, MCK_AFGR64AsmReg }, },
5926 { 1804 /* c.ngle.d */, Mips::C_NGLE_D32_MM, Convert__FCCAsmReg1_0__AFGR64AsmReg1_1__AFGR64AsmReg1_2, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_FCCAsmReg, MCK_AFGR64AsmReg, MCK_AFGR64AsmReg }, },
5934 { 1822 /* c.ngt.d */, Mips::C_NGT_D32_MM, Convert__regFCC0__AFGR64AsmReg1_0__AFGR64AsmReg1_1, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_AFGR64AsmReg, MCK_AFGR64AsmReg }, },
5938 { 1822 /* c.ngt.d */, Mips::C_NGT_D32_MM, Convert__FCCAsmReg1_0__AFGR64AsmReg1_1__AFGR64AsmReg1_2, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_FCCAsmReg, MCK_AFGR64AsmReg, MCK_AFGR64AsmReg }, },
5946 { 1838 /* c.ole.d */, Mips::C_OLE_D32_MM, Convert__regFCC0__AFGR64AsmReg1_0__AFGR64AsmReg1_1, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_AFGR64AsmReg, MCK_AFGR64AsmReg }, },
5950 { 1838 /* c.ole.d */, Mips::C_OLE_D32_MM, Convert__FCCAsmReg1_0__AFGR64AsmReg1_1__AFGR64AsmReg1_2, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_FCCAsmReg, MCK_AFGR64AsmReg, MCK_AFGR64AsmReg }, },
5958 { 1854 /* c.olt.d */, Mips::C_OLT_D32_MM, Convert__regFCC0__AFGR64AsmReg1_0__AFGR64AsmReg1_1, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_AFGR64AsmReg, MCK_AFGR64AsmReg }, },
5962 { 1854 /* c.olt.d */, Mips::C_OLT_D32_MM, Convert__FCCAsmReg1_0__AFGR64AsmReg1_1__AFGR64AsmReg1_2, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_FCCAsmReg, MCK_AFGR64AsmReg, MCK_AFGR64AsmReg }, },
5970 { 1870 /* c.seq.d */, Mips::C_SEQ_D32_MM, Convert__regFCC0__AFGR64AsmReg1_0__AFGR64AsmReg1_1, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_AFGR64AsmReg, MCK_AFGR64AsmReg }, },
5974 { 1870 /* c.seq.d */, Mips::C_SEQ_D32_MM, Convert__FCCAsmReg1_0__AFGR64AsmReg1_1__AFGR64AsmReg1_2, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_FCCAsmReg, MCK_AFGR64AsmReg, MCK_AFGR64AsmReg }, },
5982 { 1886 /* c.sf.d */, Mips::C_SF_D32_MM, Convert__regFCC0__AFGR64AsmReg1_0__AFGR64AsmReg1_1, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_AFGR64AsmReg, MCK_AFGR64AsmReg }, },
5986 { 1886 /* c.sf.d */, Mips::C_SF_D32_MM, Convert__FCCAsmReg1_0__AFGR64AsmReg1_1__AFGR64AsmReg1_2, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_FCCAsmReg, MCK_AFGR64AsmReg, MCK_AFGR64AsmReg }, },
5994 { 1900 /* c.ueq.d */, Mips::C_UEQ_D32_MM, Convert__regFCC0__AFGR64AsmReg1_0__AFGR64AsmReg1_1, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_AFGR64AsmReg, MCK_AFGR64AsmReg }, },
5998 { 1900 /* c.ueq.d */, Mips::C_UEQ_D32_MM, Convert__FCCAsmReg1_0__AFGR64AsmReg1_1__AFGR64AsmReg1_2, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_FCCAsmReg, MCK_AFGR64AsmReg, MCK_AFGR64AsmReg }, },
6006 { 1916 /* c.ule.d */, Mips::C_ULE_D32_MM, Convert__regFCC0__AFGR64AsmReg1_0__AFGR64AsmReg1_1, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_AFGR64AsmReg, MCK_AFGR64AsmReg }, },
6010 { 1916 /* c.ule.d */, Mips::C_ULE_D32_MM, Convert__FCCAsmReg1_0__AFGR64AsmReg1_1__AFGR64AsmReg1_2, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_FCCAsmReg, MCK_AFGR64AsmReg, MCK_AFGR64AsmReg }, },
6018 { 1932 /* c.ult.d */, Mips::C_ULT_D32_MM, Convert__regFCC0__AFGR64AsmReg1_0__AFGR64AsmReg1_1, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_AFGR64AsmReg, MCK_AFGR64AsmReg }, },
6022 { 1932 /* c.ult.d */, Mips::C_ULT_D32_MM, Convert__FCCAsmReg1_0__AFGR64AsmReg1_1__AFGR64AsmReg1_2, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_FCCAsmReg, MCK_AFGR64AsmReg, MCK_AFGR64AsmReg }, },
6030 { 1948 /* c.un.d */, Mips::C_UN_D32_MM, Convert__regFCC0__AFGR64AsmReg1_0__AFGR64AsmReg1_1, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_AFGR64AsmReg, MCK_AFGR64AsmReg }, },
6034 { 1948 /* c.un.d */, Mips::C_UN_D32_MM, Convert__FCCAsmReg1_0__AFGR64AsmReg1_1__AFGR64AsmReg1_2, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_FCCAsmReg, MCK_AFGR64AsmReg, MCK_AFGR64AsmReg }, },
7087 { 6497 /* movf.d */, Mips::MOVF_D32_MM, Convert__AFGR64AsmReg1_0__AFGR64AsmReg1_1__FCCAsmReg1_2__Tie0_1_1, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_AFGR64AsmReg, MCK_AFGR64AsmReg, MCK_FCCAsmReg }, },
7094 { 6516 /* movn.d */, Mips::MOVN_I_D32_MM, Convert__AFGR64AsmReg1_0__AFGR64AsmReg1_1__GPR32AsmReg1_2__Tie0_1_1, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_AFGR64AsmReg, MCK_AFGR64AsmReg, MCK_GPR32AsmReg }, },
7101 { 6535 /* movt.d */, Mips::MOVT_D32_MM, Convert__AFGR64AsmReg1_0__AFGR64AsmReg1_1__FCCAsmReg1_2__Tie0_1_1, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_AFGR64AsmReg, MCK_AFGR64AsmReg, MCK_FCCAsmReg }, },
7108 { 6554 /* movz.d */, Mips::MOVZ_I_D32_MM, Convert__AFGR64AsmReg1_0__AFGR64AsmReg1_1__GPR32AsmReg1_2__Tie0_1_1, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_AFGR64AsmReg, MCK_AFGR64AsmReg, MCK_GPR32AsmReg }, },
8870 { 1718 /* c.eq.d */, 3 /* 0, 1 */, MCK_AFGR64AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
8875 { 1718 /* c.eq.d */, 6 /* 1, 2 */, MCK_AFGR64AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
8876 { 1718 /* c.eq.d */, 1 /* 0 */, MCK_FCCAsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
8888 { 1732 /* c.f.d */, 3 /* 0, 1 */, MCK_AFGR64AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
8893 { 1732 /* c.f.d */, 6 /* 1, 2 */, MCK_AFGR64AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
8894 { 1732 /* c.f.d */, 1 /* 0 */, MCK_FCCAsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
8906 { 1744 /* c.le.d */, 3 /* 0, 1 */, MCK_AFGR64AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
8911 { 1744 /* c.le.d */, 6 /* 1, 2 */, MCK_AFGR64AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
8912 { 1744 /* c.le.d */, 1 /* 0 */, MCK_FCCAsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
8924 { 1758 /* c.lt.d */, 3 /* 0, 1 */, MCK_AFGR64AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
8929 { 1758 /* c.lt.d */, 6 /* 1, 2 */, MCK_AFGR64AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
8930 { 1758 /* c.lt.d */, 1 /* 0 */, MCK_FCCAsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
8942 { 1772 /* c.nge.d */, 3 /* 0, 1 */, MCK_AFGR64AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
8947 { 1772 /* c.nge.d */, 6 /* 1, 2 */, MCK_AFGR64AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
8948 { 1772 /* c.nge.d */, 1 /* 0 */, MCK_FCCAsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
8960 { 1788 /* c.ngl.d */, 3 /* 0, 1 */, MCK_AFGR64AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
8965 { 1788 /* c.ngl.d */, 6 /* 1, 2 */, MCK_AFGR64AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
8966 { 1788 /* c.ngl.d */, 1 /* 0 */, MCK_FCCAsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
8978 { 1804 /* c.ngle.d */, 3 /* 0, 1 */, MCK_AFGR64AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
8983 { 1804 /* c.ngle.d */, 6 /* 1, 2 */, MCK_AFGR64AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
8984 { 1804 /* c.ngle.d */, 1 /* 0 */, MCK_FCCAsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
8996 { 1822 /* c.ngt.d */, 3 /* 0, 1 */, MCK_AFGR64AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
9001 { 1822 /* c.ngt.d */, 6 /* 1, 2 */, MCK_AFGR64AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
9002 { 1822 /* c.ngt.d */, 1 /* 0 */, MCK_FCCAsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
9014 { 1838 /* c.ole.d */, 3 /* 0, 1 */, MCK_AFGR64AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
9019 { 1838 /* c.ole.d */, 6 /* 1, 2 */, MCK_AFGR64AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
9020 { 1838 /* c.ole.d */, 1 /* 0 */, MCK_FCCAsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
9032 { 1854 /* c.olt.d */, 3 /* 0, 1 */, MCK_AFGR64AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
9037 { 1854 /* c.olt.d */, 6 /* 1, 2 */, MCK_AFGR64AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
9038 { 1854 /* c.olt.d */, 1 /* 0 */, MCK_FCCAsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
9050 { 1870 /* c.seq.d */, 3 /* 0, 1 */, MCK_AFGR64AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
9055 { 1870 /* c.seq.d */, 6 /* 1, 2 */, MCK_AFGR64AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
9056 { 1870 /* c.seq.d */, 1 /* 0 */, MCK_FCCAsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
9068 { 1886 /* c.sf.d */, 3 /* 0, 1 */, MCK_AFGR64AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
9073 { 1886 /* c.sf.d */, 6 /* 1, 2 */, MCK_AFGR64AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
9074 { 1886 /* c.sf.d */, 1 /* 0 */, MCK_FCCAsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
9086 { 1900 /* c.ueq.d */, 3 /* 0, 1 */, MCK_AFGR64AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
9091 { 1900 /* c.ueq.d */, 6 /* 1, 2 */, MCK_AFGR64AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
9092 { 1900 /* c.ueq.d */, 1 /* 0 */, MCK_FCCAsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
9104 { 1916 /* c.ule.d */, 3 /* 0, 1 */, MCK_AFGR64AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
9109 { 1916 /* c.ule.d */, 6 /* 1, 2 */, MCK_AFGR64AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
9110 { 1916 /* c.ule.d */, 1 /* 0 */, MCK_FCCAsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
9122 { 1932 /* c.ult.d */, 3 /* 0, 1 */, MCK_AFGR64AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
9127 { 1932 /* c.ult.d */, 6 /* 1, 2 */, MCK_AFGR64AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
9128 { 1932 /* c.ult.d */, 1 /* 0 */, MCK_FCCAsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
9140 { 1948 /* c.un.d */, 3 /* 0, 1 */, MCK_AFGR64AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
9145 { 1948 /* c.un.d */, 6 /* 1, 2 */, MCK_AFGR64AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
9146 { 1948 /* c.un.d */, 1 /* 0 */, MCK_FCCAsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
10486 { 6497 /* movf.d */, 3 /* 0, 1 */, MCK_AFGR64AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
10487 { 6497 /* movf.d */, 4 /* 2 */, MCK_FCCAsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
10498 { 6516 /* movn.d */, 3 /* 0, 1 */, MCK_AFGR64AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
10499 { 6516 /* movn.d */, 4 /* 2 */, MCK_GPR32AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
10512 { 6535 /* movt.d */, 3 /* 0, 1 */, MCK_AFGR64AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
10513 { 6535 /* movt.d */, 4 /* 2 */, MCK_FCCAsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
10524 { 6554 /* movz.d */, 3 /* 0, 1 */, MCK_AFGR64AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },
10525 { 6554 /* movz.d */, 4 /* 2 */, MCK_GPR32AsmReg, AMFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat },