reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/Mips/MipsGenAsmMatcher.inc
 7327   { 7222 /* or */, Mips::ORi, Convert__GPR32AsmReg1_0__GPR32AsmReg1_0__SImm32_Relaxed1_1, AMFBS_HasStdEnc_IsGP32bit_NotInMicroMips, { MCK_GPR32AsmReg, MCK_SImm32_Relaxed }, },
 7334   { 7222 /* or */, Mips::ORi, Convert__GPR32AsmReg1_0__GPR32AsmReg1_1__SImm32_Relaxed1_2, AMFBS_HasStdEnc_IsGP32bit_NotInMicroMips, { MCK_GPR32AsmReg, MCK_GPR32AsmReg, MCK_SImm32_Relaxed }, },
 7341   { 7235 /* ori */, Mips::ORi, Convert__GPR32AsmReg1_0__GPR32AsmReg1_0__UImm161_1, AMFBS_HasStdEnc_NotInMicroMips, { MCK_GPR32AsmReg, MCK_UImm16 }, },
 7344   { 7235 /* ori */, Mips::ORi, Convert__GPR32AsmReg1_0__GPR32AsmReg1_1__UImm161_2, AMFBS_HasStdEnc_NotInMicroMips, { MCK_GPR32AsmReg, MCK_GPR32AsmReg, MCK_UImm16 }, },
gen/lib/Target/Mips/MipsGenDAGISel.inc
18381 /* 34426*/              OPC_MorphNodeTo1, TARGET_VAL(Mips::ORi), 0,
23442 /* 43968*/      OPC_MorphNodeTo1, TARGET_VAL(Mips::ORi), 0,
23556 /* 44199*/        OPC_MorphNodeTo1, TARGET_VAL(Mips::ORi), 0,
gen/lib/Target/Mips/MipsGenInstrInfo.inc
16664   { Mips::ORi, Mips::ORi, Mips::ORi_MM },
16664   { Mips::ORi, Mips::ORi, Mips::ORi_MM },
16801   { Mips::ORi, Mips::ORi, Mips::ORI_MMR6 },
16801   { Mips::ORi, Mips::ORi, Mips::ORI_MMR6 },
gen/lib/Target/Mips/MipsGenMCCodeEmitter.inc
 6311     case Mips::ORi:
lib/Target/Mips/AsmParser/MipsAsmParser.cpp
 2488   case Mips::ORi:   case Mips::ORi_MM:   case Mips::ORi64:
 2679     TOut.emitRRI(Mips::ORi, TmpReg, ZeroReg, ImmValue, IDLoc, STI);
 2703       TOut.emitRRI(Mips::ORi, TmpReg, ZeroReg, Bits31To16, IDLoc, STI);
 2706         TOut.emitRRI(Mips::ORi, TmpReg, TmpReg, Bits15To0, IDLoc, STI);
 2714       TOut.emitRRI(Mips::ORi, TmpReg, TmpReg, Bits15To0, IDLoc, STI);
 2732     TOut.emitRRI(Mips::ORi, TmpReg, ZeroReg, Bits, IDLoc, STI);
 2760       TOut.emitRRI(Mips::ORi, TmpReg, TmpReg, ImmChunk, IDLoc, STI);
 4206     TOut.emitRRI(Mips::ORi, ATReg, ThirdReg, 0x3, IDLoc, STI);
 4565     case Mips::ORi:
lib/Target/Mips/MipsAnalyzeImmediate.cpp
  135     ORi = Mips::ORi;
lib/Target/Mips/MipsFastISel.cpp
  373     emitInst(Mips::ORi, ResultReg).addReg(Mips::ZERO).addImm(Imm);
  382     emitInst(Mips::ORi, ResultReg).addReg(TmpReg).addImm(Lo);
lib/Target/Mips/MipsISelLowering.cpp
 1684   BuildMI(BB, DL, TII->get(Mips::ORi), MaskUpper)
 1865   BuildMI(BB, DL, TII->get(Mips::ORi), MaskUpper)
lib/Target/Mips/MipsInstructionSelector.cpp
  134     MachineInstr *Inst = B.buildInstr(Mips::ORi, {DestReg}, {Register(Mips::ZERO)})
  154   MachineInstr *ORi = B.buildInstr(Mips::ORi, {DestReg}, {LUiReg})
lib/Target/Mips/MipsSEISelDAGToDAG.cpp
 1073         Res = CurDAG->getMachineNode(Mips::ORi, DL, MVT::i32,
 1095         Res = CurDAG->getMachineNode(Mips::ORi, DL, MVT::i32,
 1164         Res = CurDAG->getMachineNode(Mips::ORi, DL, MVT::i32,
 1172         HiRes = CurDAG->getMachineNode(Mips::ORi, DL, MVT::i32,
tools/llvm-exegesis/lib/Mips/Target.cpp
   40   return MCInstBuilder(Mips::ORi)
unittests/tools/llvm-exegesis/Mips/TargetTest.cpp
   48   return AllOf(OpcodeIs(Mips::ORi),